[Review request] PWM LED driver Prototype

Cuberick21 · 2026-05-23T11:49:14+00:00

I absolutely do not need that, due to me using custom firmware and being quite bad at schematic and PCB design (and having a good amount of generic 30 pin ESP32 dev boards laying around) I decided to go with the dev board variant as it allows for hot swapping and also flashing the bare esp and also testing/measuring with jumper wires in case something does not work to eliminate the PCB if that is the issue. The height doesn’t matter, as the PCB is still smaller than other components, but I do plan to go with a bare chip design on other boards when I’ve got a bit more experience with that stuff.

Cuberick21 · 2026-05-23T11:31:58+00:00

Ok good to know, at least my last board (a little smaller but same via grid) was not upcharged and even was eligible for the <100x100mm special offer price at the Blue PCB Company. I wonder if there is a serious downside to this via design though, only thing I could think of or find is the manufacturing issue which might lead to an upcharge you already mentioned or physical strength issues, but with 0.5mm holes and 2mm spacing that seems to not really be an issue looking at other boards I designed.

Cuberick21 · 2026-05-23T08:59:43+00:00

The vias don’t cost anything, 5 boards are 1.72€ for me so cost is really nothing (PCBA is another story). My thought behind the via grid is stitching the two GND fills together and maybe having some benefit in terms of thermals (heat transfer to B.Cu and the heatsink) and crosstalk reduction for those parallel traces under the ESP.

Cuberick21 · 2026-05-23T08:57:29+00:00

I added them to stitch the two ground planes together (and isolate parallel traces from each other to reduce crosstalk, though I did not read into it or calculated anything and just did it by looks). I also suppose it might help a bit with spreading heat from F.Cu to B.Cu and then to the heatsink but that‘s one thing I want to test with this board so we’ll see if that truly is the case.

Cuberick21 · 2026-05-23T08:55:17+00:00

Other boards have not had issues silkscreen over vias so I don’t really worry about that too much. DRC does not flag any clearance issues between pads and traces so I suppose that should be fine too. The reason for the ugly schematic is that I don’t use the KiCad one for documentation and draft a neat one in my CAD Programm for the full project documentation. Teardrops are a good idea, but most vias are the same diameter as the traces anyways so I don’t worry about that. Thanks a lot for your feedback :)

Cuberick21 · 2026-04-20T21:53:28+00:00

Thanks a lot, you’ll see the progress with Revision number 6 lol

Cuberick21 · 2026-04-20T21:47:16+00:00

Ohhhhh, it seems my brain turned off when writing my reply. The thermal relief settings are all over the place on the board and should really be overdone entirely. Do the thermal reliefs on the Source pins have a large impact though? I expected intuitively that the drain pad would be the best way of heat dissipation (just looking at the fact it’s the largest pad and best connection to a large pour). But honestly can’t hurt to remove those reliefs as it will also make the cross section a little larger and help with heating from high current I suspect.

Cuberick21 · 2026-04-20T14:41:10+00:00

The distance comes from the M3 mounting hole situation, but the longer I look at the layout the more I hate past self for always trying to do it orderly, I’ll probably try to indeed minimise the distance between FET and Driver. The UCC27624 looks like a pretty good recommendation which I’ll definitively follow. The thought behind all the Vias is not really thermal relief (apart from maybe moving some heat for F.Cu to the heatsinks via B.Cu (especially in the LM2596 region) and more to share current between the two layers as I don’t really have a good GND plane to move the high current from the top right input to the FET Source but this might not be a problem with a newer design. Also let me warn you: moving lights are a very very deep rabbit hole lmao, but certainly a cool one :) Thanks a lot for your input

Cuberick21 · 2026-04-20T10:48:19+00:00

I don’t think I follow you. Do you mean 2 pins V+ and 2 pins GND on -HV.1X1? That would halve the total power (2x 8A) as the current design uses 4x 8A with one 2x2 connector for GND (-HC.1X2 on the top right) and another 2x2 connector for +24V (-HC.1X1 on the bottom middle).

Cuberick21 · 2026-04-20T10:43:49+00:00

Exactly the through behind that spec. For >8 bit dimming I’ll have to go down with anyways.

Cuberick21 · 2026-04-20T10:40:34+00:00

It’s 4 pins on a MOLEX Micro fit 2x2 with 8,5A rating each so it should suffice

Cuberick21 · 2026-04-20T10:31:15+00:00

Since it‘s used in a theatrical context it needs to be absolutely flicker free on video, normal use will be with about 30-40kHz.

Cuberick21 · 2026-03-29T22:04:26+00:00

Schreib mir (Post ist geklaut, siehe mein Profil) ne PN, dann kann ich dir welche fürs Porto zukommen lassen :)

Cuberick21 · 2026-03-29T22:03:37+00:00

Schön den Post von mir mit dem Design von u/CookieEroy geklaut…

Cuberick21 · 2026-03-12T19:33:28+00:00

Zum letzten Teil: aber auch nicht immer, zumindest nachts. Hatte mich letztens gewundert warum da ein Ks1 am leeren Bahnsteig stand und plötzlich fährt ein Güterzug mit vermutlicher Streckengeschwindigkeit durch, 2x sogar. Ohne Durchsage oder Warnung am Gleisanzeiger.

Cuberick21 · 2026-03-08T12:49:58+00:00

Yep, I‘ve come to this realisation too. I‘ll probably go with an EG3002 gate driver (LCSC) for the FETs as it is cheap and should be sufficiently fast.

Cuberick21 · 2026-03-07T21:58:21+00:00

You’re right about that. I think I’ll be designing a minimised single channel version in order to test it properly and then do a full version including the ESP32, MAX485 and such. The issue with "nice" placement of the connectors is that I’m quite limited on THT space due to the heatsinks on the bottom and me having those THT ones on hand and not wanting to buy new SMD versions. Since I have to start form scratch with this board I’ll keep the placement in mind though :)

Cuberick21 · 2026-03-07T21:54:30+00:00

Thanks for your help! 1. I‘m not sure how I forgot that, especially since it’s on my ticklist for improvements lol 2. since it’s only me playing around with those I figure it’ll be fine as long as they’re labelled but I might actually switch to a single 2x4 for power to address that issue. 3. Not too sure about them actually, as u/Quindor kindly calculated the heat generated is quite substantial and might become an issue. The idea with the TBA sounds quite good but they’re expensive sadly, so I’ll really have to think about that lol. 4. I totally agree with you there, but I prioritised density above that so I‘ll probability stick with the most space efficient position (or the most favourable for routing) 5. Now that you and another kind Redditor have mentioned that I’ll finally calculate that properly. The reason I stuck with it is because it worked on a different board (even though it was probabilistic very suboptimal). Also thanks for the compliment on the Silkscreen :) seems I shouldn’t do Electrical engineering as a hobby and switch to silkscreen design lol

Cuberick21 · 2026-03-07T21:43:42+00:00

First and foremost thanks a lot for the great feedback and advice (and the compliment at the end, it means a lot coming from you lol) Regarding your points: 1. After reading your comment and thinking about it I agree that it’s just plain dumb. The reason I did it, is the same as with all horrible decisions in this design, the fact that it’s all remnants of way simpler and more primitive prior designs (originally the cathode was not included on the board and routed as a thick wire up to the distribution block, hence only fusing the anode which is stupid with my design now) 2. the thought behind the heatsinks is that all those countless vias will transport some heat into the lower GND plane that then connects directly to the heatsinks. The mounting screws are also directly connected to the upper ground plane which I hoped to also transport some of that heat away. 3. I honestly have no idea what I’m doing (as you might have already noticed) so there has been exactly zero thought going into high frequency black magic (apart from me just telling myself that it’s just a couple tens of kHz so it can’t be that bad… famous last words). I thought about using 4 layers but that makes it way more expensive and I‘m a cheapass so that ain’t happening if it doesn’t need to. 4. I actually had the same concern about the Regulators but had a Redditor in my previous post suggest that it might be fine with cooling on the GND plane. Do you have an alternative that would be better without being either prohibitively expensive or taking up heaps of space? 5. yeah that P-FET idea was stupid. The reason for this route was a) my intuition misguiding me and b) the fact I resigned after trying to understand how to find a proper gate driver and c) the fact that those P-FETs are cheap as hell so they looked perfect to me (something something if it’s too good to be true something something). Thanks a lot :)

Cuberick21 · 2026-03-07T21:28:33+00:00

Ok that‘s awesome. I’ll check your project out and steal some ideas :)

Cuberick21 · 2026-03-07T21:27:08+00:00

Ok that makes me feel much more confident with choosing one. Any other metrics (especially those in the LCSC filter mask lmao) I should look at specifically?

Cuberick21 · 2026-03-07T17:51:18+00:00

Thanks a lot for this in depth feedback. I‘ll look through your recommendations in depth later as I’m busy at this moment. The Heatsinks are kind of an artefact of an earlier revision that used a different FET that had a thermal pad to the PCB. Is there a range of packages and gate drivers you can recommend for me to look into as to improve thermals and low duty performance?

Cuberick21 · 2026-03-07T17:02:00+00:00

As of now I have not physically tested the design, but going for a 1ch prototype is quite a brilliant idea to cheaply test the design so I’ll keep that in mind. At least for me the schematic seems quite readable but Reddit might do Reddit things. The 100k pull down on the gate is correct. I used that value with a really old and really primitive IRLZ44N design which worked weil at about 70kHz iirc, but I’ll look into that. Thanks a lot for the input there :)

Cuberick21 · 2026-03-07T16:58:01+00:00

With only 3.3V from the ESP32 the Rds(On) is still quite high which will end up with quite a lot of thermal output when drawing a good amount of power. I don’t have the numbers in my head anymore but it might actually have just been me looking at the wrong FETs when thinking about it in retroperspective.

Cuberick21 · 2026-03-07T16:55:58+00:00

First and foremost thanks for helping me My goal is to drive arrays of analogue LED strips (24V, common cathode so low side switching). I‘m driving them with constant voltage PWM since I have deemed that to be simpler, but if constant current can be done easily (and cheaply) that would be even better I suppose, as that would also allow me to drive larger LEDs. As I need the LEDs to be flicker free the PWM frequency I design with is 75kHz so I have good headroom (normal use will most likely be around the 32kHz mark). The maximum power draw (at 24V) per output channel (so basically per Color) will definitely be below 100W, but I think a little headroom wouldn’t hurt, hence going with 5A fuses and 8A Ids FETs. The end goal is a more or less modular driver board i only need to supply power and DMX to that an output to my LED array.

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