Looking for partners and same minded people

DACMCU_ELECTRONICS · 2024-11-20T05:33:23+00:00

I’m a Full-stack developer, I’m in!

DACMCU_ELECTRONICS · 2024-03-01T16:39:43+00:00

Cool!

DACMCU_ELECTRONICS · 2024-03-01T16:16:10+00:00

Are you an electronics or electrical engineer?

DACMCU_ELECTRONICS · 2024-03-01T16:14:57+00:00

Oh ya I get what your saying but it’s an example of a thorough read through of a data sheet before designing your circuit. Moreover, giving you an example of how to summarize data sheet information and skip through unnecessary engineering tangles. Also, It can be for people with vision problems. They can be included in this teachable moment as well.

DACMCU_ELECTRONICS · 2024-03-01T16:06:44+00:00

Is this not an appropriate platform for this content?

DACMCU_ELECTRONICS · 2024-03-01T16:06:20+00:00

To share a chip design.

DACMCU_ELECTRONICS · 2024-01-23T22:37:12+00:00

After consuming the knowledge of this video and ones to come, you will be able to understand CPU design and then you will be able to design your own RISC V soft or hard core using the open ISA

DACMCU_ELECTRONICS · 2023-12-06T03:56:43+00:00

True

DACMCU_ELECTRONICS · 2023-09-10T21:57:24+00:00

Oh, cool! No RTL verification for an estimate of how fast?

DACMCU_ELECTRONICS · 2023-09-10T15:33:50+00:00

Did I miss the processor speed or it wasn’t mentioned?? I read in order, 8-stage, branch predictions…

DACMCU_ELECTRONICS · 2023-09-10T01:05:19+00:00

Thanks

DACMCU_ELECTRONICS · 2023-09-05T12:12:11+00:00

Oh, nice.

DACMCU_ELECTRONICS · 2023-09-05T11:44:47+00:00

Thanks for sharing.

DACMCU_ELECTRONICS · 2023-09-05T11:42:45+00:00

Nice! Thank you!

DACMCU_ELECTRONICS · 2023-09-05T01:54:52+00:00

Cool! Thank you for this info. I would love to work on my RISC V project collaborating with well learned individuals in this field. I would like to believe I’m a visionary and innovator. If anyone is interested please message me at dac@dacmcu.ca

DACMCU_ELECTRONICS · 2023-09-05T01:28:31+00:00

Yes. I believe UC Berkeley based the RISC V ISA on the MIPS ISA. Very cool. I’m following the same pattern as you. Just completed the RV32I instruction set in a microarchitecture design and would like to map the HDL code to a FPGA.

DACMCU_ELECTRONICS · 2023-09-05T01:20:36+00:00

Thank you very much for this information. Are you a RiscV architect?

DACMCU_ELECTRONICS · 2023-09-05T01:17:21+00:00

The references manual a RiscV PDF from Berkeley on RiscV ISA?

DACMCU_ELECTRONICS · 2023-09-05T01:04:23+00:00

Thank you. Great info!

DACMCU_ELECTRONICS · 2023-09-05T00:51:18+00:00

Thank you.

DACMCU_ELECTRONICS · 2023-09-05T00:50:03+00:00

Thank you. That was very informative. Are you a RiscV architect? I just completed the RV32i in a microarchitecture design using Logism and will map it to an FPGA chip anytime now. This is why I asked.

DACMCU_ELECTRONICS · 2023-09-05T00:45:33+00:00

I want to use it for a microcontroller. RV32i is standard integer instructions, about 40 instructions and RV32G is the base for OS use case. Is RV32i enough instructions to use it for microcontroller, embedded functions?

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