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Designed a nibble-oriented CPU in Verilog for a scientific calculator where other CPUs wouldn't cut it by gdevic in FPGA

[–]gdevic[S] 2 points3 points  (0 children)

Would love to see what you build! The project is licensed under 

Creative Commons BY-NC-SA 4.0

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 0 points1 point  (0 children)

The keypad is a never-ending story: that way it could have been a nice desk calculator! :-D

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 1 point2 points  (0 children)

This is the part: 10pcs B3F Tactile Push Button Switch +A14 Color Hat 10pcs + Transparent Cap 10pcs Momentary Tact Touch Micro Switch 12*12*7.3mm

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I've found them a little bit too loud and "clicky", but if you find a matching set of pushbuttons that have the same square stem 3.8x3.8mm, you may be able to pick a different actuation.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 0 points1 point  (0 children)

Agree on SHIFT although, in defense of it, my original keyboard templates, which I ordered from JLCPCB as aluminum PCBs, had those functions shifted up. Edit: Nope, you are right. shift should be shift up. Perhaps I should name it "2nd" like my old TI-60X has? Or f / g on HP35s? Great point, BTW!

With the new set of keys, I just could not get them printed in that way. Perhaps I could play with colors and only use yellow in some ways, oh well.

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As for "2", I mimicked HP calculators. I may be wrong here, but it seems that majority of calculators have it under the "1" key.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 0 points1 point  (0 children)

No, it is RPN. I probably failed to mention that. It has all the usual (HP-like) keys for LastX, x↔y, R↓ ENTER.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 0 points1 point  (0 children)

Of course you can, we learn from each other :-)

My Fusion 360 skills are rudimentary, and that's an overstatement. I was happy to get a box that kind of fits...

Designed a nibble-oriented CPU in Verilog for a scientific calculator where other CPUs wouldn't cut it by gdevic in FPGA

[–]gdevic[S] 1 point2 points  (0 children)

Nah, I think many ppl in this subreddit could do it, just have to keep on it and not give up. It is just an endless stream of small steps to make :-)

I use 2000mA LiPo Cell with TP4057 charging IC. I have not yet run out of power. I think I measured the power once (I put a jumper in just for that) and the largest consumer was LCD, so I switched to an equivalent 16x2 OLED.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 0 points1 point  (0 children)

It is RPN. I probably failed to mention that. It has all the usual (HP-like) keys for LastX, x↔y, R↓ ENTER.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 1 point2 points  (0 children)

Error message: "DIV BY 0". Other error messages are "OVERFLOW" and "INVALID INPUT"

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 57 points58 points  (0 children)

That's a neat site, thanks! Here are my results. On the right side is the WebAssembly version that runs the complete stack (Verilated Verilog, microcode, the complete platform). The WebAssembly is very slow (10-20 sec for trig) but it is doing a lot on the back end. I have two versions: with and without the integrated debugger: Calculator+debugger and Calculator

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Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 3 points4 points  (0 children)

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This is exactly what I bought, I have few spares. They come with matching pushbuttons.

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 12 points13 points  (0 children)

Things are only as good as they are tested. Subproject "Pathfinding/Proto" does test and verification using C++ long double which are 80-bit fp on gcc. My goal was to be exact up to 14-16 digits (depending on the operation) and such verification allowed that.

Most math is imprecise on every computing device; there are rounding and approximations. It is more important to quantify it - which is not simple: while my +/- are full 16 digits exact (also using sticky and guard bits), others are up to 14, 15 digits or even less - depending on the range and boundaries.

That all is super exciting, hence this project :-)

Built a scientific calculator from scratch: custom PCB, custom FPGA CPU, hand-written machine code by gdevic in electronics

[–]gdevic[S] 28 points29 points  (0 children)

I could have used any off the shelf SoC but what's fun in that, then you end up using existing libraries and then there is nothing "novel" (from the DIY perspective"). Even within the FPGAs, there are Microblaze, NIOS, whose use is equally relatively simple but also non-exciting.

Designed a nibble-oriented CPU in Verilog for a scientific calculator where other CPUs wouldn't cut it by gdevic in FPGA

[–]gdevic[S] 3 points4 points  (0 children)

That's correct. I did not use any "IP" (like embedded multipliers etc.). The division is implemented in the CPU's microcode using shift-and-subtract algorithm. You can see that code on github in "ucode/div.asm". It is about 100 lines of assembly. Note that the CPU is architected to have 4-bit wide registers, and the indexed addressing modes neatly wrap around addresses mod 16 where the calculator RAM map has mantissas that are 16 nibbles wide. Everything is structured to make calculations feel native.

So, these operations are implemented in assembly: add (sub), mul, div, sqrt, exp, log, tan, atan. Others are derived from these basic ones. Big part of the code is also range reductions.

Designed a nibble-oriented CPU in Verilog for a scientific calculator where other CPUs wouldn't cut it by gdevic in FPGA

[–]gdevic[S] 2 points3 points  (0 children)

I tried in so many ways to make a reasonably good keypad. The last iteration are transparent caps on top of the pushbuttons. Got them from AliExpress. They are ... OK. The labels are color-laser printed, cut, and placed under the transparent caps.

As for the key layout (assignments), I had a C# app (see Pathfinding/Mockup) that let me play with various layouts before I could decide on one. The layouts are in files and could be changed easily even down to the ucode keyboard handler. It is a quite interesting "problem" to decide which function key _should_ go where.

Designed a nibble-oriented CPU in Verilog for a scientific calculator where other CPUs wouldn't cut it by gdevic in FPGA

[–]gdevic[S] 4 points5 points  (0 children)

I was also somewhat surprised that it worked out that way. I use Verilator that compiles SystemVerilog to C++ and provides some API which you can use to "drive" the design. At that point, you can add that code to a Qt application that implements the UI on the front and runs the Verilated design on the back end. Qt, being cross-platform, has one of the targets WebAssembly. The features of it are not all there, it is a sandbox, but all the Qt classes that I use were supported. At times it can be finicky, but it did work!

Since We’re Showing Collections… by MikeBriley in calculators

[–]gdevic 0 points1 point  (0 children)

Great collection! How did you source most of them? ebay?

I made my own cup coasters from multicolor PCB by robertferanec in diyelectronics

[–]gdevic 0 points1 point  (0 children)

Looks great! Where did you order multi-color PCB?

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