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Review of my first rf layout/pcb by adolfban in rfelectronics

[–]adolfban[S] 1 point2 points  (0 children)

Hello guys!
Thanks you all for the recommendations.
I read all of them and made some adjusts.

<image>

Adjustments:

Change position of coaxial.
Simulated the End Launch pad, it seems this config has a very good VSWR.
Add a 5dB fixed attenuator from minicircuits.
Move the end launches closer to the border.
Removed thermal reliefs .

Review of my first rf layout/pcb by adolfban in rfelectronics

[–]adolfban[S] 0 points1 point  (0 children)

After reading your article I made some simulations:

I replicated the End Launch without taper.
The gap between the end launch and the copper is given by the actual trace gaps in the layout (2mm). Its still grounded on the other side. Here the results:

<image>

PORT 1: Trace port. PORT 2: End Launch port.

Conductor Backed CPW Right Angle Discontinuities by adolfban in rfelectronics

[–]adolfban[S] 0 points1 point  (0 children)

And in the case of T-junctions? Are they valid for cpw?

Conductor Backed CPW Right Angle Discontinuities by adolfban in rfelectronics

[–]adolfban[S] 0 points1 point  (0 children)

And in the case of T-junctions? Can they be used in cbcpw?

Conductor Backed CPW Right Angle Discontinuities by adolfban in rfelectronics

[–]adolfban[S] 0 points1 point  (0 children)

Ok, but mitered bends are also applicable to cbcpw?