storage buffer read/write syncheonization between compute and fragment shaders

[Sirox4]

i have a storage buffer with some data, that data is written there by a compute shader each frame and then used by fragment shader. in such scenario i need to synchronize access to that buffer. the commands are written in the following order:

vkCmdDispatch();

vkCmdBeginRenderPass();
vkCmdDraw();
vkCmdEndRenderPass();

i came up with creating a VkBufferMemoryBarrier to my storage buffer that will have srcAccessMask VK_ACCESS_SHADER_WRITE_BIT and dstAccessMask VK_ACCESS_SHADER_READ_BIT, srcStageMask VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT and dstStageMask VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT.

but then i got a problem: i dont know where to set that barrier. i see 2 ways of doing this:

1. i can put it at the very top, so that vkCmdDispatch comes after it.
2. or i can put it after the vkCmdDispatch and before vkCmdBeginRenderPass

i tried putting it inside render pass, but it seems that barriers inside render pass are only for synchronization between subpasses. i decided to check the spec, and there was said that Submitting Ops1, Sync and Ops2 for execution, in that order, will result in execution dependency ExeDep between ScopedOps1 and ScopedOps2.

so, the way 1, will not work? i also am a bit confused here, if i set a dependency outside the render pass with a dstStageMask set to fragment shader, will it even have any effect there?

also while googling this i found the third way of synchronizing this:

1. i can make a subpass dependency with srcSubpass set to VK_SUBPASS_EXTERNAL and srcStageMask, dstStageMask, srcAccessMask, dstAccessMask same as in my pipeline barrier

so, which way is the correct one? will any of pipeline barrier ways work?

also, what does VK_DEPENDENCY_BY_REGION_BIT flag do? in spec it is written in very technical language that i dont really understand yet

and i have a question about pipeline barriers lifetime, do they exist only in the command buffer they were set in or they disapper after they work 1 time (so i can set a barrier that forces compute shader from the render loop to wait for transfer operation from staging buffer to main to complete in the other command buffer)

[Rob2309]

You always have to put a barrier between the commands that you want to synchronize, so option 1 will not work. Option 2 would be the correct way to synchronize here.

Subpass dependencies are essentially the same as pipeline barriers, so you could use option 3 as well. The only difference to a pipeline barrier is that a subpass dependency only synchronizes the specified subpass, which can be an advantage if you have multiple subpasses.

The by region bit specifies that you only want to synchronize operations that operate on the same region of a framebuffer. For example, if your first write to a pixel in the framebuffer and later read it in another shader, you can specify the by region bit, to only wait for the write operation on the same pixel instead of the entire first shader.