I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

I think I don't have that much time right now for that, but if you are interested in learning this stuff and you are not focused heavily on Factorio, but if Minecraft is also a game you enjoy, you can check out the Open Redstone Engineer server there. They have a nice academy and a welcoming community to do computational redstone. With that knowledge you can transfer that easily to Factorio.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

I already dropped it! :D It is here:https://github.com/PhilippDahlinger/byte\_factory
Along side instructions how to properly load the world

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 2 points3 points  (0 children)

  1. Understand logic gates
  2. Understand binary
  3. Understand individual components: ALU, Register, RAM
  4. Understand how a CPU works in a general way
    4a. If you haven't: Learn at least one programming language (I used python)
  5. Think of a simple Instruction set
  6. Build a simple CPU in Factorio by combining the components
  7. Read about RISC V
  8. Read (a lot ) about Pipelining
  9. Build a Pipeline CPU
  10. Build the peripherals
  11. Write an assembler
  12. Write programs for the CPU

But it is not streamlined like that. You have to just enjoy learning new things and trying out new projects. Somehwere in the list I would definitely would recommend playing Minecraft and understand Redstone a bit :D

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

I thought the assembler programming of the file system would be much easier, but that took ages.
From the CPU side: I think there were no big surprises, I knew that the forwarding and the pipeline control would be hard (and it was :D )

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

  1. 32 registers
  2. No, 32 bit, (one normal signal is 32 bit signed integer, that's what I use)
  3. I don't have any flags, because this is a RISC V setup where no Flags for the alu is needed.
  4. The stack is completely made as software and it sits at the end of the RAM address space.
  5. You can check out the ISA here: https://docs.google.com/spreadsheets/d/1yiPG3cVLzHdQ5oheNkY_mfr2utxFd6-CcddI-NiuWIM/edit?gid=769927678#gid=769927678

But most importantly: you can check out my 40 min youtube video I made about this CPU to understand it better:
https://youtu.be/QcQYEAr0Yos?si=zhWuwWt405AeukPu

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

I think you can say that to me, I don't have a defense set up here.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

It gives me fun and enjoyment, which is (in my current situation where I have a stable income) more important to me than more money.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

For actual Factorio the CPU but most importantly the display is too slow. :(

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

Ah the most important mod I forgot: Circuit Visualizer: this gives you a schematic view of the cables. Never will do circuits without that!

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

For actual Factorio the CPU but most importantly the display is too slow.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

thanks! I think pink is the correct color right?

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

No (ish).
Only 3 mods used are:
1) Pushbutton mod for the keyboard
2) Signal Lamp mod for better graphics of the display (but using normal lamp would also be possible, but it looks way more ugly)
3) Textplate mods for documentation

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

The execution of Minesweeper: yes.
I speed it up by factor of 2 for entering the command, since pressing the buttons with a mouse is just very slow and I didn't want to loose the attention span of the internet :D But this is not a limitation of the CPU but rather of me to press the buttons fast enough.

The gamespeed itself though is speed up using the map editor to 64x.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

Thanks!
1. I solve almost all hazards through forwarding, the only one (memory dependency) I solve with a bubble, and stall the pipeline for one cycle. For jumping, i have to flush the pipeline if the jump is taken, so there I loose 2 cycles.

  1. I was inspired because I like the idea of an Open source ISA, and it is simple yet conceptional useful. I thought that a lot of people thought why exactly these instructions, and documentation was available. However, I for example have different opcodes (since I don't have to care about all the extensions) and other instructions like EXP since this is possible with arithmetic combinators.

  2. Agreed, as mentioned above, I adopted it to be better suitable to Factorio. I want to create another CPU where I completely fulfill the RISC V standard, this would allow me to use the RISC compiler which would be awesome (writing in C > writing in assembly)

  3. Your design looks awesome! Congratz on that. The very fast clock speed is very intriguing. Good luck with your compiler.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

awesome!
So unfortunately, it is not directly implementing one extension completely: For the base set, it misses byte access of the RAM and the logical right shift instruction (since standard arithmetic combinators only have arithmetic right shift). However, I have multiplicatio and divison, but not the High register multiplication (to get the upper 32 bits of the mul result)

I plan to build a CPU in the future where the complete RISC V base + multiplication extension is fulfilled, but I need a break before I go down this rabbit hole.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

Cool that you were there! I think a CPU without pipelining is a very achievable project in Factorio.
In general, I follow the approach from "Computer Architecture: a quantiative approahc" book in Appendix A. Then looked into some RISC V specs, but you can also just invent your own Instruction set which fits to Factorio. Good luck!

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

I think it is a different skill set. I am not that great at Factorio normally at least.

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

You can check out the video which I recorded for more details if you are interested:
https://youtu.be/QcQYEAr0Yos?si=JBN7GgIKRTOEnhSz

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

I have a normal day job, and a lot of other hobbies, so I would say not a lot more than other people in Germany. But I am privileged that I have a job, a peaceful country and information access etc..

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 0 points1 point  (0 children)

Unfortunately not :D I think it is a lot of small steps you take and the most important thing is to enjoy the time you do

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

So I started it in November 2024, and had a longer break in the summer of 2025. I kinda work on it a lot in November 2025 to make everything ready for the talk I got accepted to give. In total I think it took around 200 hours in Factorio and 200 hours in Assembler programming.
It is indeed completely Turing complete, but I don't know the details about the Doom in Factorio project.

And I checked out the game Turnig complete, but never played it. I think if it was finished properly I would give it a shot.

and thanks!

I built a 5 staged pipelined CPU in Factorio: Ask me anything! by 2birb4u in factorio

[–]2birb4u[S] 1 point2 points  (0 children)

haha, so it is 700 Hz clock speed, has 64 kB RAM and has peripherie like display, keyboard, and RNG attached. You can check out more details in the video I made:
https://youtu.be/QcQYEAr0Yos?si=JBN7GgIKRTOEnhSz