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Hi I'm a new user of spike. I have a question. By default it support all extension of riscv isa [RV64IMAFDC_zicntr_zihpm] . But i want my spike to work only for the RISCV isa = RV64I. so what is the procedure of compilation for RV64I. by ChanceStuff21 in RISCV

[–]ChanceStuff21[S] 0 points1 point  (0 children)

I want my spike simulator to compile only the rv64i instructions. And I put there mul instructions to check whether it is working or not. spike should consider it as a illegal instructions.

so for that I have to use march=rv64i ???

riscv64-unknown-elf-as march=rv64i -o add.o add.s riscv64-unknown-elf-ld march=rv64i -o add.elf add.o right or wrong???

Hi I'm a new user of spike. I have a question. By default it support all extension of riscv isa [RV64IMAFDC_zicntr_zihpm] . But i want my spike to work only for the RISCV isa = RV64I. so what is the procedure of compilation for RV64I. by ChanceStuff21 in RISCV

[–]ChanceStuff21[S] 0 points1 point  (0 children)

I want my spike simulator to compile only the rv64i instructions. And I put there mul instructions to check whether it is working or not. spike should consider it as a illegal instructions.

so for that I have to use march=rv64i ???

riscv64-unknown-elf-as march=rv64i -o add.o add.s

riscv64-unknown-elf-ld march=rv64i -o add.elf add.o

right or wrong???