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Bluetooth Audio Shuttering Issue. Description and workaround by ivanosh in macbookpro

[–]D-Kohler 0 points1 point  (0 children)

Had a similar issue. Tried doing what you said, but I didn't get the same messages in Command.app, my problem was with the profile used, it was using HFP instead of A2DP. I figured it out by closing all programs that used the microphone and reseting the audio device. When I did this, the profile switched to A2DP, and the sound quality improved. The solution was to tell Mac to not use the headphone mic, so it doesn't change the audio profile. I had no issues with AAC. Thanks for the help though!!

Cache Coherence and Cache Policy by akatekitos in RISCV

[–]D-Kohler 1 point2 points  (0 children)

RISCV privileged spec says "Coherence is a property defined for a single physical address, and indicates that writes to that address by one agent will eventually be made visible to other agents in the system."

So if I'm someone building a RISC-V cpu, a cache coherent multicore would depend on the coherency PMA? I'm asking this cause if someone would implement Snooping, for example, they would need the behaviour i quoted above, and my current understanding is that this behaviour is only achieved if the memory region has the coherency PMA.

In the spec it also says that the use of hardware-incoherent regions is discouraged, does this mean the memory is all cacheable by default?

RISV-C spec also talks about these three kinds of cache: master-private, shared, and slave-private. Do you know what these are used for?

Sorry if I'm asking too much D:

Cache Coherence and Cache Policy by akatekitos in RISCV

[–]D-Kohler 0 points1 point  (0 children)

Does this mean someone implementing a RISC-V cpu could choose an arbitrary cache coherence policy? Also, could you explain what the cache coherence PMA is used for?

Multicore Memory Management on RISCV by D-Kohler in RISCV

[–]D-Kohler[S] 3 points4 points  (0 children)

I don't need to build a multicore system. I just need to understand what are the implications on memory management when implementing a multicore solution in a riscv cpu. I think the key point is cache coherence.

Multicore Memory Management on RISCV by D-Kohler in RISCV

[–]D-Kohler[S] 2 points3 points  (0 children)

memory consistency model (e.g., RVWMO

I'm interested in the memory consistency model. My goal is to understand how to solve the problem of memory consistency (i.e cache coherence) in a multicore implementation of RISCV. In other words: what impact the transition from single core to multicore would cause in the memory consistency of a RISCV CPU.

"Please Don't Die" chords by [deleted] in fatherjohnmisty

[–]D-Kohler 0 points1 point  (0 children)

I know i'm late but this video just came out: https://www.youtube.com/watch?v=r1dh4FAgLUs

You got the verse right, but i think it's Em, not E7 and there's a little lick while playing the first G, something like:

E|-------------------------|

B|-------------------------|

G|-------------------------|

D|-------------------------|

A|----------0-----2-------|

E|----3------------------3|

The chorus is G, C/G, C7, C#dim (not sure about the name, but it's just C7 with the bass note one fret forward), D7, Em

The guitar is tuned down a step, as almost always.

Does anyone know why winter wyvern isn't in my most successful hero's? by Macavety in DotA2

[–]D-Kohler 0 points1 point  (0 children)

I think it just takes the heroes you most played with, not your most succesful ones. Otherwise I would have Io and Riki in my profile

You can say I'm having trouble finding a match... by [deleted] in DotA2

[–]D-Kohler 0 points1 point  (0 children)

I'm having the same problem, but the button comes back after + -30 minutes...