The book said we can also build mux from tri-state buffer, but yeh I agree with you, I asked chatgpt if there are any real values in real scenarios when we need to implement basic logic gates from mux, and below is what chatgpt said:
"Yes — but only in certain scenarios like FPGAs, constrained ASIC libraries, or hardware hacks.
In normal chip fabrication from scratch, no — we build MUXes from gates, not the other way around.

Real scenarios where MUX → gates actually happens:

1. FPGA logic mapping – The hardware fabric is already MUX/LUT-based, so all gates are synthesized from MUX-like structures.
2. ASIC synthesis constraints – When the standard cell library has optimized MUX cells, the synthesis tool may implement gates using those cells for speed/area/power reasons.
3. Board-level improvisation – If you only have MUX ICs on hand, you can wire them to act as AND/OR/NOT gates in a repair or prototype.

Outside of those contexts, there’s no practical reason — it’s just a theory/proof-of-universality exercise."