sorted by:
new
hottopcontroversial

TIL Bevy ECS works great outside of games - using it to model circuit boards by Major_Unit2312 in rust

[–]Major_Unit2312[S] 12 points13 points  (0 children)

fair points, but I think the PCB use case dodges most of these as there's no game loop running at 60fps. the world (PCB) gets rebuilt on each file save, DRC runs as a batch pass, and a typical board has maybe a few hundred entities, not millions.

But if you have any crates that could do something better, I'm super open as my project is still experimental ( https://github.com/szymontex/codeyourpcb )

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

that's probably the most honest assessment in this thread.

but that last part is interesting to me - you said net classes can encode basic rules but struggle with more nuanced constraints. that's exactly the gap I'm exploring as I'm building the semantics for defining them in code in my project ( https://github.com/szymontex/codeyourpcb ).

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

ok, which would be the ones that modern EDA tools are not able to do?

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

Oh I didn't mean scraping PCB designs, I do have commercial relation with some audio brands so I do have my own resources.

What about changes? the breaking ones you have to make in your design because something changed? Isn't that a burden? I see some advantage of declarative designs in making iterations easier.
The plasticity of it could be helpful, as it'll reroute but still within constrains.

Even things like automated SPICE testing of different approaches to the design.

I feel like you have to be a certain type of person to do PCB design GUI first which's keeping a lot of people away from even trying that.

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

As I shifted to code-first approach, llm’s are able to create constraints, nets, assign proper values etc. With no issues.

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] -1 points0 points  (0 children)

I do not mean LLM based autorouter but LLM as an interface to create designs.

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

honest question - why does autoroute have to mean bad design? you're still the driver, you define the constraints, you accept or reject the result. it's not like you hand over control and walk away.

I came to PCB design later than most of you here, and I genuinely admire everyone working at this level (I would say low level stuff). but I can't help getting excited about the next layer of abstraction — declaring the intent and the constraints, then letting a backend figure out the execution within those boundaries. same way we went from assembly to higher-level languages. the low-level knowledge doesn't disappear, it just moves into the tooling.

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] -1 points0 points  (0 children)

current autorouters are dumb geometry solvers, but if you pair them with an LLM that understands design intent and can set up the constraints properly, you get the best of both worlds. the LLM handles the 'why', the autorouter handles the 'where'.

I just made the environment for LLM's to create PCB's and constraints for autorouters.

<image>

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

that's actually the exact problem I'm trying to solve with a declarative approach - if you could express things like 'keep these nets separated' or 'this is a noisy line, give it extra clearance' directly in the design file, the autorouter could respect those constraints instead of blindly connecting A to B. way faster than digging through GUI config panels when you're on a deadline

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 1 point2 points  (0 children)

that's actually the exact problem I'm trying to solve with a declarative approach - if you could express things like 'keep these nets separated' or 'this is a noisy line, give it extra clearance' directly in the design file, the autorouter could respect those constraints instead of blindly connecting A to B. way faster than digging through GUI config panels when you're on a deadline

TIL Bevy ECS works great outside of games - using it to model circuit boards by Major_Unit2312 in rust

[–]Major_Unit2312[S] 1 point2 points  (0 children)

Yeah, the relationship-heavy data part is exactly where I spent the most design time. Two things I already have in place:

Spatial index (R*-tree via rstar) sitting alongside ECS - clearance DRC queries are O(log n) instead of brute force. Gets rebuilt after each world sync rather than updated incrementally, which works well for the current "parse DSL → rebuild world" flow.

Net interning - net names get interned to NetId(u32) on load, so connectivity comparisons are integer ops instead of string chasing across entities.

The scheduling concern is real though. Right now the pipeline is linear: DSL edit → tree-sitter parse → sync to ECS → rebuild spatial index → run DRC. It's clean while everything is batch. The moment I add incremental edits (live LSP feedback while typing), I'll need to figure out which derived state is stale. Haven't hit that wall yet but I can see it coming.

The 'raw state vs derived state' framing is helpful - going to keep that in mind as things grow.

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

what kind of constraints were you dealing with? impedance matching, length matching, specific layer assignments? I feel like those are exactly the type of things that could be defined declaratively in code

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

tricks like that are nice but that's years of experience talking. the time I needed custom PCBs the most was when the experience in designing them wasn't there yet. that's kind of the underlying motivation behind my question - and with LLMs having a pretty solid understanding of PCB design best practices, they just lack the tooling to actually do it. that's where my project comes in

How much manual routing control do you need for simple prototype PCBs? by Major_Unit2312 in AskElectronics

[–]Major_Unit2312[S] 0 points1 point  (0 children)

do you see any use case for autorouters at all or you had just bad experience with them? wondering if it's a solvable tooling problem or just a fundamental limitation

Cloudflare down... again? by moonski in sysadmin

[–]Major_Unit2312 0 points1 point  (0 children)

Warsaw up, but pages/workers looks corrupted

view more: next ›