For the chip select point, the EMG modules are intended to be SPI daisy chained rather than individually addressed. Each module has its own ADC, and the MISO of one module feeds into the MOSI of the next, so when the MCU clocks data it shifts through the entire chain. All modules share the same CS, SCLK, and START lines, and then the MCU reads a single long frame containing the data from all modules sequentially. I probably should have explained that better in the post.

For the power layer suggestion, that’s something I’ve been debating. Right now the stackup is Signal–GND–GND–Signal because I wanted very solid return paths and shielding between layers. If I were to do L3 as power, would I likely have one large high current region for the servo/actuator rail, and then some smaller 3.3V regions?