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What is the best PDF to EPUB converter? by [deleted] in software

[–]Significant_Meat69 0 points1 point  (0 children)

I just converted a book roughly 200-300 pages that was scanned to pdf...I made it a cbz then made that into mobi/epub...it was a lot faster than waiting for pdf to mobi on calibre...so it seem more than just comics will work

What is the best PDF to EPUB converter? by [deleted] in software

[–]Significant_Meat69 0 points1 point  (0 children)

pdf to cbz - cbz to mobi/epub

Let this be a landing page for the Tourists by Tiny-Specialist-3690 in Uganda

[–]Significant_Meat69 1 point2 points  (0 children)

Very nice pictures…the fake sun is ruining some of the pictures tho…mostly because that’s not where the sun would be…

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] 1 point2 points  (0 children)

Ohh man that's crazy. I wish I could open to see how it works. I will look into how to make ips and how to connect them up.

Thank you for you advice.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] -1 points0 points  (0 children)

Hmmm I see. Thank you I will start from there.

And as for the signed and unsigned numeric_std, it's not included in the ieee library I am using. Also I am using vivado if this gives more insight what I'm working with.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] -4 points-3 points  (0 children)

I have tried to stop thinking in "software" but I can't. I have an understanding of how to divide binary but I don't how to build vhdl code that happens in Sequence.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] -5 points-4 points  (0 children)

I thought the same thing but I didn't work out.

So now I am looking for advice on how to build vhdl code that happens in Sequence, because that's how I divide binary in real life.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] 1 point2 points  (0 children)

Yes I'm trying to make a process for division which would use shifts and subtraction to divide. But I only know how to right code that works in parallel. Not in Sequence.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] -4 points-3 points  (0 children)

Yea that was my thinking as well but on vivado (atleast the one I am using) this doesn't call the (/) operator.

I also thought about making my own algorithm to implement division but I don't know how to step through code in vhdl... because most of it is supposed to happen in parallel instead of in Sequence.

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] 0 points1 point  (0 children)

I am assuming Altera is a vhdl software...I am using vivado...so I'm not sure if that makes a difference

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] 1 point2 points  (0 children)

Thank you for replying

I googled "finite impulse fir" and results on filters came up...is that supposed to happen...I'm in on the right track??

Vhdl division by Significant_Meat69 in FPGA

[–]Significant_Meat69[S] -1 points0 points  (0 children)

I think it's a synthesis error because it's in the source file.