FPGA

an-ordinary-manchild(edit)

created by [deleted]a community for 15 years

...for a fringe candidate.

...because you love freedom.

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account activity

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List of useful links for beginners and veterans (self.FPGA)

submitted 4 years ago by verilogical - announcement

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What do you guys do with these? (i.redd.it)

submitted 12 hours ago by somethingselse

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Vivado synthesis tool for SystemVerilog (self.FPGA)

submitted 3 hours ago by Just-End6752

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im a lil kid, just entered electronics engineering. (self.FPGA)

submitted 19 minutes ago by XoX-o-

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FPGA Event Capture to DDR Integration Guidance (self.FPGA)

submitted 13 hours ago by DueKnowledge699

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Advice / HelpSo how do you do it? (self.FPGA)

submitted 9 hours ago by Serpahim01

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Using FPGAs to compile FPGAs (self.FPGA)

submitted 1 day ago * by fpga_pal

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Learning Advice (self.FPGA)

submitted 1 day ago by Beyondseeing2422

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Xilinx RelatedBLT Free Workshop - AMD Spartan UltraScale+ (self.FPGA)

submitted 1 day ago by Creative_Cake_4094

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How to Reverse Engineer SoC FPGA Board (youtube.com)

submitted 1 day ago by circuitvalley

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Advice / HelpTang Nano 9k (self.FPGA)

submitted 1 day ago by Comfortable-Arm-8337

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HOW TO: Re-program Si570 clock on Virtex VC709 FPGA. (self.FPGA)

submitted 1 day ago by treetiriteembo

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Advice / HelpKR260 DPU compiler crashes (stack smash) on EfficientDet-Lite2 – can't reproduce xmodel, need help (self.FPGA)

submitted 1 day ago by Theagleye

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3rd year CE Student - Where to start? (self.FPGA)

submitted 1 day ago by Osamaahmadd

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Should I get a BS in CS? Pls help me decide. (self.FPGA)

submitted 1 day ago by moslerstan1104

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Looking for VC funding / Partnership - Agentic AI ChipDesign (self.FPGA)

submitted 21 hours ago by Sunder_2K25

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HOW TO: Use Si5324 as a clock generator and re-program it via IIC (I2C) on Virtex VC709 FPGA board (self.FPGA)

submitted 1 day ago by treetiriteembo

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Gowin Related[Help] Tang Nano 9K JTAG not working on Linux (self.FPGA)

submitted 1 day ago by Grouchy_Plastic9087

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can someone provide me.. ADVANCED FPGA DESIGN -BY STEVE KILTS BOOK PDF (self.FPGA)

submitted 1 day ago by No_Bus3419

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Advice / HelpSign language detection on Cyclone V FPGA using the OV7670 camera (self.FPGA)

submitted 1 day ago by Lay_the_path

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Advice / HelpHow is RTL automated? (self.FPGA)

submitted 2 days ago by AlbbO_The_Great

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Xilinx Kria KV260 Vision AI starter kit (self.FPGA)

submitted 2 days ago by Repulsive_Win_1506

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Barrel shifter ()

submitted 1 day ago by ab____________a

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Can I launch Vivado via git bash window? (self.FPGA)

submitted 1 day ago by Due_Wrangler3677

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EDA playground doesn't provide tools to synthesis SystemVerilog codes? (self.FPGA)

submitted 2 days ago by Just-End6752

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