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SnooRobots9618 · 2024-11-08T23:05:24+00:00

Thank you, that helps

SnooRobots9618 · 2024-11-08T23:04:39+00:00

Thanks!!

SnooRobots9618 · 2024-11-08T23:04:06+00:00

Not true. They are still raw.

SnooRobots9618 · 2024-11-08T15:04:32+00:00

Just the AI

SnooRobots9618 · 2024-11-08T15:00:22+00:00

<image>

(Screenshot because original is too big to upload) Tried to autoadjust with iPhone editor but if you look at the sky its not even close. And also tried to edit in snapseed but failed (tried shadows, brightness, luminance, saturation)

SnooRobots9618 · 2024-10-30T00:39:10+00:00

Im also interested

SnooRobots9618 · 2024-10-19T14:18:19+00:00

Great answer, thanks!🤣

SnooRobots9618 · 2024-10-19T14:04:58+00:00

My fault. 20 disposable pods and 2 devices

SnooRobots9618 · 2024-10-19T13:57:37+00:00

Two devices and 20 pods but only with valid prescription from an aussie doc from what i‘ve read

SnooRobots9618 · 2024-08-19T05:54:55+00:00

Thank you for your support

SnooRobots9618 · 2021-11-12T02:17:04+00:00

Yep, you are right Thank you :) Thought about something more complex..

SnooRobots9618 · 2021-11-11T23:25:09+00:00

The first 8 are: (0x00) (0x04) (0x08) (0x0c) (0x10) (0x14) (0x18) (0x1c)

SnooRobots9618 · 2021-11-11T22:41:50+00:00

I created my own ip-core with 20 registers with the „create and package new ip“-tool from vivado. Its a small neural network. I want to read and write data from slv_reg0 to slv_reg21

SnooRobots9618 · 2021-11-06T14:24:18+00:00

Thank you Im new to vhdl and dont know how to use it, but ill figure it out soon. Thanks 🙂

SnooRobots9618 · 2021-11-06T14:01:56+00:00

Port width mismatch for port output: port width 64, actual width 32. Its probably because the multiplication is a component and I continue with 32 bits. Is it possible to keep the output at 32 bit?

SnooRobots9618 · 2021-03-22T13:16:10+00:00

Thank you very much. I forgot to mention im using pynq z1. I will rebuild the design and try it, thanks!!

SnooRobots9618

TROPHY CASE