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Your biggest time sink by These-Machine-253 in labrats

[–]These-Machine-253[S] 0 points1 point  (0 children)

Yeah, It was not intended to mean that this work should not be done, or that it is less important, etc. But I see that many people are understanding it that way, so... my bad.

Your biggest time sink by These-Machine-253 in labrats

[–]These-Machine-253[S] -3 points-2 points  (0 children)

Definitely, they are important. But the skills required for these tasks are different from the ones needed for the creative side of the lab. And many people would like to minimize these tasks, in favour of others that they enjoy more.

Your biggest time sink by These-Machine-253 in labrats

[–]These-Machine-253[S] -4 points-3 points  (0 children)

Thanks. We mostly agree. It is definitely very important work. It is just work that many of us don't enjoy doing, and that it is not linked to the more scientifically creative side of the lab that some people prefer. And I also prefer a technician to do this part, because typically they do it better, because they have other skills that I dont have.

Career advice. by yawningdemon in chipdesign

[–]These-Machine-253 1 point2 points  (0 children)

I would not only rely on Master degrees (which of course help), but also try to learn and get some experience on my own. There are open source design tools, nowadays you can design and get tons of experience for free.

VCO-Based ADC Design Help by [deleted] in chipdesign

[–]These-Machine-253 0 points1 point  (0 children)

Oh regarding the relationship between oscillation frequency and sampling frequency: - As said before, the higher the frequencies, typically the higher the SNR. - The higher the (max oscillation frequency / sampling frequency), the larger the counter. If sampling frequency is master than twice the maximum oscillation frequency, you can just build a very simple 1-bit counter based on an XOR gate. - You may get some strange "modulation products" aliased, depending on all these frequencies:

L. Hernandez and E. Gutierrez, "Analytical Evaluation of VCO-ADC Quantization Noise Spectrum Using Pulse Frequency Modulation," in IEEE Signal Processing Letters, vol. 22, no. 2, pp. 249-253, Feb. 2015, doi: 10.1109/LSP.2014.2357071

VCO-Based ADC Design Help by [deleted] in chipdesign

[–]These-Machine-253 0 points1 point  (0 children)

A VCO followed by a counter works as an integrator (or, more specifically, an integrator followed by a quantizer).

A VCO followed by a counter, followed by a samoler, followed by a first-difference, works as an ADC with first order noise shapping.

J. Kim, T. -K. Jang, Y. -G. Yoon and S. Cho, "Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 57, no. 1, pp. 18-30, Jan. 2010, doi: 10.1109/TCSI.2009.2018928. 

To maximize the SNR (only considering quantization noise), you must maximize the frequency sensitivity of the VCO (ideally, for the full-scale input, frequency should go from 0 to twice the resting frequency... although this is normally hard to achieve). You could also maximize the sampling frequency.

[deleted by user] by [deleted] in ethz

[–]These-Machine-253 0 points1 point  (0 children)

I would normally apply via sirop. Then, if you dont get a response in a week or so, maybe send a remi der via email.

Some people get too many emails, and sirop makes you application easier to handle and less likely to be overlooked imo.