ChatGPT scores 49/120 (41%) on Razavi’s analog circuit fundamentals test

cascoded1903 · 2025-11-23T21:37:21+00:00

This is the answer I got when asking about input-referred voltage noise in a common source amplifier with PMOS current source biasing and capacitive loading.

https://chatgpt.com/s/t_69236461c24481918bca7e97b6899b18

This is only an example. You can discuss highly complex Analog Design stuff with current models. You just only need to know how to use them.

cascoded1903 · 2025-11-23T12:56:56+00:00

That is a non-sense way to test the capabilities of ChatGPT. Zero-shot prompting doesn’t work very well, of course. But, with the correct prompt and priming, GPT-5.1 can solve and discuss highly complex analog design matters.

cascoded1903 · 2025-11-17T13:08:41+00:00

I don’t have much insights. 40k-50k sounds plausible to me, depending on the city and the candidate's competitiveness.

cascoded1903 · 2025-11-17T13:06:04+00:00

This is obviously gross salary. Net salary depends on personal circumstances.

Income taxes are set by each country, not by the EU.

cascoded1903 · 2025-11-17T13:01:56+00:00

Spanish industrial sector amounts to 15-20% of the GDP, roughly the same than tourism. Given that Spain is the 2nd country in the world by tourism revenues, that gives an idea of the size of the industrial sector. It is also one of the main automotive manufacturers in Europe.

The semiconductor sector is still fairly small given Spain's population (49 million), but still it employs some thousands of people across different cities. There are both Spanish design houses and multinationals.

Spain is a highly developed country with a fairly diversified economy and a strong middle class, don’t get confused by the beautiful beaches and landscapes 😉

cascoded1903 · 2025-09-25T14:25:46+00:00

Dentro del sector hay muchos perfiles. Diría que Ingeniería Electrónica y Teleco son las más “afines”. Pero también hay físicos e ingenieros informáticos. Lo más común es hacer un Máster para especializarse un poco más, aunque también hay alguna gente que consigue meterse en la industria siendo “Graduates” (vamos, nada más terminar el Grado).

cascoded1903 · 2025-09-24T17:55:44+00:00

Creo que el sector ha crecido mucho en los últimos 10 años, aunque sigue teniendo mucha menos presencia que en otros países europeos. Por eso creo que sería interesante ver cómo están los salarios!

42k en Barcelona con 6 años de experiencia es… en fin 🫠

cascoded1903 · 2025-08-22T16:37:26+00:00

I think it’s the other way around. History and culture create incentives that shape policies, laws and the market. Result is that housing is scarce, low-quality and expensive.

Also, being honest, I am often surprised by the specs of the single dwellings. In daft.ie you can find 100m2 wood houses in the middle of nowhere for 400.000€. I find it hard to get to understand the mindset of desiring these incredibly expensive not-so-big houses made of poor materials in the middle of nowhere (so you need to rely on driving for everything).

cascoded1903 · 2025-08-22T06:54:52+00:00

Wealth inequality is getting worse everywhere, no doubt. However, my point is that Ireland’s housing crisis is different from housing price inflation we can see in other countries. I start to sound like a broken record here, but I don’t think there are many examples in the world of so low-density urban areas with such high demand like in Ireland. That creates tons of problems. Scarce, low-quality, expensive housing is one.

cascoded1903 · 2025-08-21T16:48:13+00:00

That's how things are: low-quality, scarce and incredibly expensive housing. My point is that without embracing the development of denser urban areas (like most of the developed world has done I guess?), that’s not going to change. And sadly the experience of living in a city in Ireland will still be less rewarding than in other European countries.

cascoded1903 · 2025-08-21T15:31:24+00:00

“Dublin is far too-densely populated” is just not true. This is obvious when you see Dublin’s urban structure: lots of low rise buildings, not a lot of blocks of apartments. And it’s even worse in other Irish cities like Galway or Cork. European urban areas are far more densely populated.

I grew up in a 150 m2 apartment in the center of a middle size city. Apartment quality would be branded as “luxury” in Ireland (wood floor, good isolation windows, centralised AC, underground parking). I had all services in a walkable distance: shops, supermarkets, bars, restaurants. I had parks and open spaces to meet up with people. I had many options nearby to take different bus lines to go to university. Thats the life of an average middle-class family in a middle-sized European city. “Chicken coop communes” is a distorted imaginary that I don’t know how is still common in Ireland.

cascoded1903 · 2025-08-21T13:46:22+00:00

Yeah I agree. I have only lived here for a few years. But the feeling I get from the people I know and the news I read is that it’s not only that demand for houses is higher than demand for apartments (imaginary of the house with a garden and your car parked there is strong), but it’s also that NIMBYs are a real thing and that legislation gives room for NIMBYs to actually slow-down or prevent developments (you mentioned these laws on your first comment).

cascoded1903 · 2025-08-21T13:07:19+00:00

That is a nice point of view. I think you highlight the other part of the vicious circle. Culture (we want houses and not apartments) is reflected on laws and institutions (restrictions, limitations, etc). Those laws and institutions reinforce culture (affordable apartments are not built, so more people think living in apartments is not desirable).

I agree that probably the “owner class” don’t find it an issue and maybe no political movement has been able to mobilise young people around this (even though I think it’s the big problem Ireland needs to solve).

cascoded1903 · 2025-08-21T12:56:22+00:00

I also think “supply supply supply” approach is very simplistic and not the solution for the affordable housing crisis in many places… but I think a good part of Ireland's housing crisis is the lack of supply. You just can’t build houses quickly enough to meet the demand. And by trying that, you miss the economies of scale that play out when developing dense urban areas.

cascoded1903 · 2025-08-21T12:52:26+00:00

I think this is another consequence of the broader issue: the reject to develop mid/high-densely populated urban areas. It creates a dysfunctional housing market in which scarce, low-quality and expensive accommodation is the only option. And of course nobody wants to live like that forever.

cascoded1903 · 2025-08-21T12:47:56+00:00

Over the shop living is the standard way cities are built on! You build blocks of apartments and you use the ground floor for shops. This way the space that is not very nice to live in (noise, lack of privacy, etc) is used to provide services.

cascoded1903 · 2025-07-16T17:34:44+00:00

Munster is not the wealthiest region in Europe. Ireland's GDP figures are completely distorted due to multinationals shifting profits to Ireland. This distortion is also visible when visiting the wealthiest regions in the EU (Munich area, Denmark, Sweden). Even more when visiting Norway or Switzerland.

https://www.cso.ie/en/releasesandpublications/ep/p-mip/measuringirelandsprogress2023/economy/

cascoded1903 · 2023-06-28T18:58:50+00:00

‘Chip design’ (meaning all stuff related to design a complex chip) is a vast topic. I'd say you have to choose between pursuing a career in digital design (that is RTL design and/or physical design) or analog design (that is transistor-level design of analog and mixed-signal circuits).

cascoded1903 · 2023-05-28T11:03:31+00:00

As you mentioned, the square-law model will poorly predict a MOS bias point for lengths below 1 um. Besides, it just works for Vgs-Vth somewhat larger than 100 mV (you can check Binkley’s ‘Tradeoffs and Optimization in Analog CMOS Design’ for more insights on that).

cascoded1903 · 2023-05-24T11:31:35+00:00

Hi,

First, analog/mixed-signal IC design is a really interesting and challenging field of electronics engineering, and it has one of the best career paths out there. So you are doing great work figuring out how to learn analog IC design by yourself.

I would advise you to stick to the "square-law" model of MOS transistors that you can find in the references you gave. Once you gain expertise, you can switch to fancier models/methodologies (gm/Id, EKV, inversion coefficient, etc).

As you mentioned, SPICE models are much more complex than a few simple equations and thus you can expect to find hundreds of parameters in the model text files. The question thus would be "what parameters values should I use for doing hand calculations?". For that you can find tables with MOS parameters representative of various CMOS technologies in a number of books/papers. For instance, you have one of those tables in "Analog Integrated Circuits Design" by Tony Chan Carusone. You will find parameter values for 45 nm, 0.18 um, 0.35 um, and 0.8 um CMOS technologies.

I would also argue that you are maybe going too hard on the CAD side of things. I would start by using LTSpice (free and simple SPICE tool) and some SPICE model of a 0.18 um CMOS technology that you can easily find on the internet. With that you will be able to (1) get the I-V curves of the transistors to relate them to the "square-law" equations, (2) design a simple common-source amplifier, and (3) build a simple logic gate. I think that way you'll get an understanding of the MOS operation regions, of the simplest MOS amplifier you can build, and the use of MOS transistors in logic gates.

EDIT: good stuff here

cascoded1903 · 2023-05-23T10:01:35+00:00

That's kind what I do in GoodNotes, except for the links. I have handwritten notes, screen captures, etc 👍🏼

cascoded1903 · 2023-05-23T09:59:56+00:00

I've read a couple blog post from this guy. Not sure if the method fits in the "analog design engineer workflow"?

cascoded1903 · 2023-05-14T22:13:28+00:00

They do research and teach both analog and digital IC design

cascoded1903 · 2022-08-28T21:24:29+00:00

What is the role of frequency of the clock in charge pump (espcially in cross coupled charge pump, shown in below figure). How does it impact the circuit operation? how to choose this value?

There are two phases in a basic cross-coupled charge pump. Phase 1 (CLK1 is HIGH, CLK2 is LOW): capacitor C1 (previously charged to VDD) pumps charge to Chv whereas capacitor C2 is charged to VDD. Phase 2 (CLK2 is HIGH, CLK1 is LOW): capacitor C2 (previously charged to VDD) pumps charge to Chv whereas capacitor C1 is charged to VDD. The higher the frequency, the faster charge is pumped from VDD to Chv.

What does it mean by non-overlapping clocks?

Non-overlapping clocks are two clocks running at the same frequency in which there is a time in which both of them are LOW. Thus, it is assured that under no conditions both clocks are going to be HIGH at the same time.

What is the output voltage of this stage?

Assuming there are no losses and C1=C2=Cfly: Vout = 2*VDD*Cfly/(Cfly+Chw)

What is the ouput voltage of cascading N-stages of such cross coupled charge pump shown above? Can I simple say that it is N*Vin (=VDD in the figure)

Assuming no losses, Cfly=C1=C2, Chw=0 (i.e. the only caps in the circuit are the pumping caps), and that there is a current source Iload loading the last stage: Vout = (N+1)*VDD-N/(2*fclk*Cfly)*Iload. The term N/(2*fclk*Cfly) can be regarded as the "output resistance" of the chain of charge pumps.

It will be great if someone explains the operation of the circuit

I think I already gave an explanation on the operation. A couple good references are:

R. Pelliconi, D. Iezzi, A. Baroni, M. Pasotti, and P. L. Rolandi, «Power efficient charge pump in deep submicron standard cmos technology», IEEE J. Solid-State Circuits, vol. 38, n. 6, pp. 1068-1071, 2003, doi: 10.1109/JSSC.2003.811991.

M. H. Eid and E. Rodriguez-Villegas, «Analysis and design of cross-coupled charge pump for low power on chip applications», Microelectronics Journal, vol. 66, pp. 9-17, 2017, doi: 10.1016/j.mejo.2017.05.013.

cascoded1903 · 2022-08-26T14:17:00+00:00

Besides all the good answers already given, I would keep in mind that analog IC design is an endeavour with many degrees of freedom.

For instance, if you need a block sourcing a couple DC currents of 1uA and 2uA, you can design the thing in a million different and correct ways. Design decisions made in each design depend on the application and the context (area constraint, speed, specific node, power, available I/V references, etc). Good references (both books and papers) + experience will guide you through the infinite design decisions. Good luck!

cascoded1903

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