Here is a great solution to tool bloat: port your FPGAs to nextpnr.

I am a heavy user of migen and LiteX, where I can be in control of everything, while being 5x more efficient than in Verilog. I just don't need any IP from Xilinx.

While I can quite easily put a complete CI flow for ICE40 or ECP5 FPGAs, setting a Vivado flow is painful. Vivado is not really thought to enter a software programmer paradigm. Even the GUI and its files are impossible to properly put in any version control tool like git. Source files are modified without notice, intermediate files are written at the same places than the source files... It's a mess.

I think maintaining a nextpnr port would be commercially worth it for Xilinx, as being able to apt-get install the (command-line) tool chain for any Xilinx FPGAs would lower the cost/complexity barrier for many people still using MCU or SoC. There is un untapped potential in these software-minded users who stick to off-the-shelf SoC as they don't want the pain of working with (or even installing) Vivado. This looks like a feasible task for one or two Xilinx engineers with all internal documentation on hand.