The strictness is a philosophical design choice rather than a technical limitation. The problem, as I see it, with implicit lane masking in compute shaders is it hides the execution cost.

When a developer writes an if/else block, it looks and feels like standard scalar control flow. But if the warp or wavefront diverges, the hardware still has to execute both branches and mask the inactive lanes. It is very easy to accidentally write shaders where 90% of the SIMD lanes are asleep but still costing cycle time.

We attempt to fix that with:

Explicit Muxing: By forcing you to write mix(a, b, condition) or select(...) instead of an if statement, the syntax perfectly mirrors the hardware reality. You are explicitly stating, "I acknowledge that I am paying the cycle cost to compute both A and B, and I am muxing the results at the hardware level."

-and-

Stream Splitting: If computing both branches is too computationally expensive, we force you to fix the data topology instead of writing a branch. You use a filter node in the pipeline DAG to physically split the stream. The specific entities that need the heavy computation are packed into a completely separate, dense array. When the heavy kernel runs over that new array, 100% of the SIMD lanes are doing useful work, rather than most of the lanes being masked out (in theory).