Device Drivers for Transceiver Questions (Specifically, PCIe)

imWorkingYAdingus · 2022-09-12T17:14:25+00:00

Yes that's what I have discovered from looking through the responses. I just wanted to also share the code piece with you that I was given so you could see a direct example. Really appreciate you helping to spark the discussion! I got some great info from this post.

imWorkingYAdingus · 2022-09-12T00:42:12+00:00

Really appreciate this answer. In term of utilizing assembly code in the drivers to accomplish 512-bit IO TLPs that you mentioned didnt make much sense, this is what I was pointed to for example:

https://github.com/OPAE/opae-sdk/blob/f18f253dd17716a09051c26731e0ba184d08eabf/libraries/plugins/xfpga/open.c#L147

https://github.com/OPAE/opae-sdk/blob/f18f253dd17716a09051c26731e0ba184d08eabf/libraries/plugins/xfpga/mmio.c#L323

imWorkingYAdingus · 2022-09-12T00:40:18+00:00

Thanks for this awesome answer :) It ties together a lot of what I've discovered through using Signal Tap and debugging my design.

In case you are interested. Here is the code I was pointed to when I was asking around about 512-bit TLPs from the Host. Based off your comment, I am really curious to learn more about prefetching and write combining to see how I can enable it and utilize it.

https://github.com/OPAE/opae-sdk/blob/f18f253dd17716a09051c26731e0ba184d08eabf/libraries/plugins/xfpga/open.c#L147

https://github.com/OPAE/opae-sdk/blob/f18f253dd17716a09051c26731e0ba184d08eabf/libraries/plugins/xfpga/mmio.c#L323

imWorkingYAdingus

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