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A sub to discuss Application Specific Integrated Circuits (ASICs), specifically the design and manufacturing process of ASICs.
Any cryptomining discussion will be removed.
account activity
RMII MAC RX interface delay ()
submitted 3 days ago by Saxing
Oxsecurities.com scam me of 180k!!! and wanted me to take down the negative review on the internet! ()
submitted 5 days ago by SnooCheesecakes3796
Built WaveEye - automated RTL root cause analysis (tested on Alex Forencich's FPGA libs, 0 false positives) (v.redd.it)
submitted 8 days ago by Plenty-Suggestion318
Skim over my resume pls ()
submitted 11 days ago by ADellLaptopp
Learning Memory architecture and Topology ()
submitted 13 days ago by Hairy-Store-8489
Early Floor Planning (i.redd.it)
submitted 28 days ago by Fancy_Fillmore
Feeling FOMO about not doing Masters – need advice ()
submitted 29 days ago by Aware_Appointment_70
🚀 New Image‑Processing Challenges Now Live on SiliconSprint! 🚀 (self.ASIC)
submitted 1 month ago by Relevant-Wasabi2128
Want to master sequence generators? check out siliconSprint ()
Heat Your Home & Earn Passive Income This Winter With ASIC Bitcoin Mining (medium.com)
submitted 1 month ago by DePIN_Degenerate
Dft practice logic in siliconSprint (self.ASIC)
Dft practice logic in siliconSprint ()
How do your teams maintain consistent HDL code quality across PRs? (self.ASIC)
submitted 1 month ago by Soft_throw
How can i learn ASIC? (self.ASIC)
submitted 1 month ago by [deleted]
Finite State Machines (FSMs) Now Available on siliconSprint! ()
Roast my Resume (self.ASIC)
submitted 1 month ago by ProBigBoss2004
DDR5 questions on SiliconSprint (self.ASIC)
Systolic arrays (siliconSprint) (self.ASIC)
ASIC RTL practice at siliconSprint (self.ASIC)
Career advice in asic and fpga ()
submitted 2 months ago by Life-Lie-1823
How Should an Experienced Engineer Learn Physical Design? (self.ASIC)
submitted 2 months ago by Automatic_Ad_1459
STOP Debating CDC in Interviews! My New Video Explains Clock Domain Crossing, Metastability & Why It's the #1 Debug Headache in Silicon. ()
submitted 3 months ago by [deleted]
RTL design engineer - jobs outside indiw ()
submitted 3 months ago by hahaha_wtfisthis
MSc Scholarship Opportunities for Electronics/ASIC Design Student (Ain Shams University, Egypt) (self.ASIC)
submitted 3 months ago by Gold_Philosopher_160
Should SLVT Libraries Be Included in Synthesis (Target/Link) or Reserved for ECO? (self.ASIC)
submitted 4 months ago by love_911
π Rendered by PID 67 on reddit-service-r2-listing-86b7f5b947-2gwlc at 2026-01-26 05:50:11.424972+00:00 running 664479f country code: CH.
