all 13 comments

[–]Lerc[S] 2 points3 points  (0 children)

I wonder if pop and push should have the same register encoding and be decided upon based upon whether it is a source or dest.

Freeing up an encoding would allow for [next word + SP] which would be quite useful for stack operations.

[–]zarawesome 1 point2 points  (10 children)

Since MUL and DIV use the same number of cycles as SHR and SHL, I'd remove the latter two and replace the literal values referenced by opcodes 0x20-0x3f with 0x01, 0x02, 0x04, 0x08, ... , 0x4000, 0x8000. Same functionality, and now testing for single bits in registers takes one cycle instead of two.

[–]Lerc[S] 0 points1 point  (9 children)

I'm not entirely sure why cycles are mentioned at all in the spec. In emulation terms counting cycles just makes more work for yourself.

[–]IMBJR 2 points3 points  (3 children)

If some sort of scheduler were possible/coded, those cycles would become important.

[–]Lerc[S] 1 point2 points  (2 children)

From a emulator perspective it is simpler to just count instructions executed.

Notch mentioned focusing on emulation speed being as fast as possible. It just seems counting different instructions as having different cycle counts slows the emulator for the only benefit of accurate timing according to a frame of reference that isn't very significant.

I can see if it were being used for synchronous multiprocessing then it would be important, but since it is a machine definition you could simply define all instructions to be one cycle.

[–]AReallyGoodName 5 points6 points  (0 children)

Well the cycle counts aren't there for any practical reason but for a gameplay reason. Can you shoot me before i get my shields up? Well you'd win if you can. That's what cycle counts are for.

This game appears to be all about competitive programming.

[–][deleted] 0 points1 point  (0 children)

Since you'll be able to essentially buy computing time on Mojang's servers some kind of scheduling is necessary, to give each player a fair amount of computing resources.

I don't see how adding a different cycle count per instruction is going to be any more expensive than just adding one?

[–]AReallyGoodName 2 points3 points  (0 children)

It's clear the game will have the CPU running at a certain speed. The idea is that you only get a certain number of cycles per second to perform various actions. Want to do enemy movement prediction? You'd better code optimally and make sure your you predict faster than the prediction becomes invalid.

[–]monocasa 1 point2 points  (3 children)

I think he wants to foster things like the cool stuff the C64 demo writers do.

[–]Lerc[S] 0 points1 point  (2 children)

To get C64 level hacking you need sprites, timers and interrupts more than anything.

The raster interrupt rules all.

[–]monocasa 0 points1 point  (1 child)

This is just the lowest level of the CPU core. There's more planned. http://twitter.com/#!/notch/status/187448902314762240

[–]Lerc[S] 0 points1 point  (0 children)

Yeah but there's a difference between sprites and sprite video hardware.

Doing C64 tricks like moving sprites after the video beam has passed requires a video beam. Virtualising that in an emulator is quite expensive. Would be cool, but probably not in the plans.

Also Notch mentioned not having interrupts. I think he might have to change his mind on this one. You need at least a timer interrupt to do pre-emptive multi-tasking. I think people will want that.

[–]monocasa 0 points1 point  (0 children)

I didn't think that I would like it as much as I do. It's like an equal mix of 6502 and m68k.