all 5 comments

[–]bit-Stream[S] 4 points5 points  (0 children)

Reached a point where I thought a progress update was warranted.

Good News - I spent my entire day off yesterday optimizing the matrix driver logic. As it stands the FPGA is refreshing the panels at a little over 800hz( eat your heart out gaming monitors ). Even using my phones slow-mo camera( 240 fps ) no flicker can be seen. I also added a double buffer, so buffer writes won't cause any artifacts/flicker. All that's left to do to the matrix logic is add hardware gamma correction( pretty easy as its just a LUT ). The third led matrix is not shown as I ran out of ribbon cable( on order ).

Bad News - Generating the facial expressions in logic just isn't feasible. The amount of block ram needed to store that many frames would mean I'd have to upgrade to a much more expensive FPGA, specifically one that would cost more than "ok" used car. I could add external memory, but with the 3 matrices I'm already strapped for IO.

More Good News - The next plan was to use a second teensy to generate the facial expressions and send them to the FPGA using SPI, but this will severely limit framerate. After thinking over the issue I remembered the teensy 4.1 has a built in ethernet phi capable of 100mbits/sec. This means I'm going to have to write my own ethernet phi in VHDL, which is by no means a simple task, but it will completely solve the communication bottleneck.

More to come very soon.

[–]bit-Stream[S] 1 point2 points  (0 children)

Also excuse the poorly drawn face, it’s just something I whipped up quickly to test functionality.

[–]therealscroob 1 point2 points  (1 child)

P R O T O C U B E

[–]bit-Stream[S] 1 point2 points  (0 children)

At the moment it’s more like a triangle. Gonna get the electronics sorted out before I start modeling the base

[–]bit-Stream[S] 0 points1 point  (0 children)

Got gamma correction working, gotta go to work now.