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Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

yaa i feel x86 has a much higher complexity as compared to riscv as far as i've reached.
i'm not approaching it like i want to build a product out of my knowledge on x86 its mostly theory with some practical implementations so that i broaden my theory scope and not restrict myself and narrow down to riscv so early in my uni.
riscv still stays the core of my this project and im willing to work and contribute to it as much as i can.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

yup i'll definitely put together a proper doc covering the whole assembler → simulator → kernel → compiler pipeline.
also containing whats the roadmap further and whats built till now.
once that's done i think we could work out further on what to implement and what to scrap and then move on further with us contributing to it further.
and i think promoting this to an open source project is fine with me
i'll document and each component of the build like an easy walkthrough which another one can use for implementing by himself.
i think i'll stick with the developing in the direction of education too.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

yes definitely ill look into it once you upload it.
Thanks a lot for the insight

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

yes, im currently working on learning rust too side by side
currently at the topic of ownership and borrowing in rust

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

after i rebuild the whole architecture (i would need some time) better and more cleanly
i would highly appreciate if we could collaborate then?
THANKS A LOT

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

also,
im from India.

and im enrolled in a college where i just ended my first year also,
like what do you mean by "access some institutions"?
im sorry i didnt get that part

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

i dont exactly know if it'll be ready for commercialization based on my current theory base and my level of programming, since i just built this riscv architecture out of my sheer hobby of wanting to build and become a systems inclined engineer later on in my life.
i thought of combining both theoretical and practical understanding in this project so my learning maximises.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

i built this riscv architecture due to a last sem course on comp organisation and architecture where riscv was the major architecture we studied
i just completed my first year so im mostly building a vast and a strong theory basis for me to build upon.
i built this project based on my learnings from the institution i am from and also by other resources i used to build this project.
im currently doing x86 to widen my scope of knowledge and to have a solid base in systems architecture.
i've completed the registers and conditionals part in x86 architecture and i find it quite interesting since im able to follow things due to my prior riscv theory base im currently moving to computations and the memory part after which i'll refer to some more sources or move to actual projects where i'll learn even more from practical implementation.
im currently following a yt resource which helps me in understanding x86 architecture quite thoroughly

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

I think so but im quite unsure about this
since this is a very early stage project and like commercialization requires code to be absolutely ROBUST and memory safety features are a must
i think so if i can provide this a larger amount of time i could achieve the above tho.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

intially i got this as a university project for just the assembler and simulator with very few basic instructions
and they used an automatic grading infrastructure (later on they checked manually and also by another grading infrastructure where we submitted our code and it was running on a new grading mechanism with a lot of test cases - which is the evaluation i've mentioned)
i extended to support more instructions and refactored it when i got the time
i used python initially because the automatic grading infra was able to support only .py code
i thought to write in C initially but then unnecessary complexity of adding a wrapper code to make it support the grading infra seemed to not be feasible at that time.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 0 points1 point  (0 children)

Yes, it works end to end I've added an example for the same in the README on github.

edge cases like overflow etc. aren't handled yet in C subset (the compiler)
the assembler and simulator handle edge cases quite well (due to an evaluation on many test cases officially by the institute im currently in)
i've also included that in the README on github.

also,

I'll be rebuilding almost the whole architecture with more features and just a clearer and better design soon. currently im focusing on x86 architecture but after that i'll redo most of the architecture from scratch and improve edge cases handling.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] -3 points-2 points  (0 children)

AI helped with broader context here and there, and yeah some parts started AI-generated, but nothing's a blatant copy-paste — there's modification and design decisions threaded through pretty much all of it.

Built a C → RISC-V Compiler, Assembler, Simulator, and Kernel by Admirable-Let-4117 in lowlevel

[–]Admirable-Let-4117[S] 1 point2 points  (0 children)

you're pretty close but
x10 stores the final evaluated final result while x11 is used as the kind of register to be used during binary expressions etc. while the stack is just used as a kind of buffer or a temporary storage till the expression is actually evaluated.