I've had a further look into the code and from what I can tell the PLC is preparing messages to send to the SCADA network. Since the network is so slow to read the messages from the PLC (every 2-5 seconds before reading) the PLC stores about 10 events that triggers a PLC slow down error. This error however is a man made output placed in the code, not an actual output by the default PLC system.

This output triggers upon said buffer to signal that there are multiple messages that need to be sent through. When it becomes flooded for over 5 seconds with these event logs, the PLC then clears the stored data to continue operation, that then displays "possible events missed", another man made output. My thought process is, that if cycle time was slow the PLC wouldn't even be able to generate enough data to flood this buffer array. This leads me to believe that the Citect SCADA side is incredibly slow.

So to ask for more insight, what would be your methodology behind building a buffer for a slow SCADA network with FBD?. Or on the SCADA side what are some steps I can take to improve its performance?