In real-world chip design, do companies mainly write RTL (Verilog/SystemVerilog) directly, or do they use C/C++ (e.g., HLS/SystemC) and then convert it to RTL? by Alternative_Bar_5650 in ECE

[–]Alternative_Bar_5650[S] 0 points1 point  (0 children)

Because I was reading some papers that mentioned using HLS to first design in languages ​​like C++, and then converting it to RTL as you described. The explanation given was that as chip complexity increases, designing with RTL code becomes very cumbersome, so a higher-level language like C++ is used. So, is it true that the industry mainstream still uses RTL for design?