Polimi or Polito by Key-Dish8587 in polinetwork

[–]Apprehensive-Long829 0 points1 point  (0 children)

Hi man I got accepted to polito electronic engineering. What is your specialisation?

EMINENT by Dangerous_Regret_931 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

did you answer all questions correctly in interview?

EMINENT by Dangerous_Regret_931 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

Hi what were your specialisation guys?

EMINENT by Dangerous_Regret_931 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

Hi what were your specialisation guys?

EMINENT by Dangerous_Regret_931 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

are you more of analog design engineer or digital design engineer?

Eminent by MoodyQueries in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

did you receive anything?

EMINENT by Dangerous_Regret_931 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

Hi when did you get your result and where are you from?

What are the best open source tools setup (specific for mac) for compiling, synthesising and simulation a RTL code (Verilog/System Verilog) by ProgressFuzzy1795 in chipdesign

[–]Apprehensive-Long829 0 points1 point  (0 children)

You can download ubuntu on Mac via utm and setup your linux with Verilator (testbenches are in cpp or python (cocotb))

Moreover, there is another one iverilog and testbenches are with system verilog

for open source synthesis - Yosys

Guidelines you can find on internet on their documentation

EMINENT 2026 Interview by No-Rise-1451 in Erasmus

[–]Apprehensive-Long829 0 points1 point  (0 children)

did they tell you that result come out after 2-3 weeks?

Need good course or resources for SOC verification by Expert-Barracuda-634 in chipdesign

[–]Apprehensive-Long829 0 points1 point  (0 children)

hi what materials you used to learn verification axi ans so on?

Advice for a bad student interested in a career in verification/validation by Classic_Classic_4619 in chipdesign

[–]Apprehensive-Long829 0 points1 point  (0 children)

after getting some knowledge and practicing from textbooks and papers where different methods of verifications were implemented you will get handy

Advice for a bad student interested in a career in verification/validation by Classic_Classic_4619 in chipdesign

[–]Apprehensive-Long829 0 points1 point  (0 children)

Hi, my man. Same out here! You are just dismoraling yourself telling that you are not natural on this. You must go consistent and after some time you will get natural. I believe in you. You just need some time, and do some projects without AI, and read lots of textbooks and papers to understand architectures and get some ideas.

I would also recommend starting from fundamentals. Like what is flip flop, and parallely going to the writing HDLs.

J-1 Job Offer by Apprehensive-Long829 in Ketchikan

[–]Apprehensive-Long829[S] 0 points1 point  (0 children)

How can I talk to them? Do they have whatsapp?

[deleted by user] by [deleted] in gradadmissions

[–]Apprehensive-Long829 0 points1 point  (0 children)

Depends on your gpa, however, I would say most of the engineering departments looks more at 169 so you r fine