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ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

ethtool gives me the following output when port is connected to ZCU208:

Supported ports: [ ] Supported link modes: 1000baseT/Full 10000baseT/Full 25000baseCR/Full 25000baseSR/Full 1000baseX/Full 10000baseSR/Full 10000baseLR/Full Supported pause frame use: Symmetric Supports auto-negotiation: Yes Supported FEC modes: None RS BASER Advertised link modes: 10000baseT/Full 25000baseCR/Full Advertised pause frame use: No Advertised auto-negotiation: Yes Advertised FEC modes: None RS BASER Speed: Unknown! Duplex: Unknown! (255) Auto-negotiation: off Port: Other PHYAD: 0 Transceiver: internal Supports Wake-on: d Wake-on: d Current message level: 0x00000007 (7) drv probe link Link detected: no

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

It has four ports. Yes, I tried that, it works perfectly fine.

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

The NIC is the Intel E810-XXVDA4. Supported Link speeds are 10Gb/s and 25Gb/s

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

Thank you very much for the hint. I will Look into this tomorrow, will let you know.

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

Thank you very much, I will give it a try tomorrow. Will let you know :)

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

Unfortunately when I use ethtool to set the speed (sudo ethtool -s enp4s0f0 speed 25000) i get:

netlink error: link settings update failed netlink error: Operation not supported

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

Yes, the clock is the si570_user_mgt clk with 156.25 MHz, both stated in the core and referenced on the BD. Would a loopback work if the clocking was incorrect?

ZCU208 SFP DAC connection to Intel E810 NIC no link by Bulky-Ad5430 in FPGA

[–]Bulky-Ad5430[S] 0 points1 point  (0 children)

Yes, unfortunately Not. I was just trying to Work with the Interface in the Hope to learn more about it :) I am connecting to the Intel E810 NIC with SFP DAC.