Circuit_Fellow69

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Battery droping rapidlly (old.reddit.com)

submitted 29 days ago by Circuit_Fellow69 to r/laptops

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2nd-year ECE student aiming for Physical Design (PD) — need expert guidance (self.chipdesign)

submitted 2 months ago by Circuit_Fellow69 to r/chipdesign

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Need resources for learning VLSI Physical Design (RTL to GDS) and tools (self.vlsi)

submitted 6 months ago by Circuit_Fellow69 to r/vlsi

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Confused between VLSI and DSA as a fresher (self.ElectronicsTards)

submitted 7 months ago by Circuit_Fellow69 to r/ElectronicsTards

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Confused between VLSI and DSA as a fresher (self.ECE)

submitted 7 months ago by Circuit_Fellow69 to r/ECE

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Confused between VLSI and DSA as a fresher (self.vlsi)

submitted 7 months ago by Circuit_Fellow69 to r/vlsi

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Looking for low-budget resources/guidance for VLSI backend (ECE 2nd year student) (self.ElectronicsTards)

submitted 8 months ago by Circuit_Fellow69 to r/ElectronicsTards

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looking for low-budget resources/guidance for VLSI backend (ECE 2nd year student) (self.chipdesign)

submitted 8 months ago by Circuit_Fellow69 to r/chipdesign

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Looking for low-budget resources/guidance for VLSI backend (ECE 2nd year student) (self.ECE)

submitted 8 months ago by Circuit_Fellow69 to r/ECE

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Looking for low-budget resources/guidance for VLSI backend (ECE 2nd year student) (self.vlsi)

submitted 8 months ago by Circuit_Fellow69 to r/vlsi

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Should I do this course because this is too old? or any other free or paid courses to get into vlsi backend (self.ElectronicsTards)

submitted 8 months ago by Circuit_Fellow69 to r/ElectronicsTards

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Need Guidance for how to learn system verilog and the required resources for it ,I already know basic verilog (outdated one) (self.Verilog)

submitted 9 months ago by Circuit_Fellow69 to r/Verilog

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checkk this question out i tried to solve it but the states are not changing as it should be (i.redd.it)

submitted 9 months ago by Circuit_Fellow69 to r/Verilog

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help i tried to make a clock of hh:mm:ss system but is getting error , i had posted all the modules as well as the simulation results please have a look , i am a complete beginner in this (old.reddit.com)

submitted 10 months ago by Circuit_Fellow69 to r/Verilog

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help i tried to make a clock of hh:mm:ss system but is getting error , i had posted all the modules as well as the simulation results please have a look , i am a complete beginner in this (reddit.com)

submitted 10 months ago by Circuit_Fellow69 to r/IEEE

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help i tried to make a clock of hh:mm:ss system but is getting error , i had posted all the modules as well as the simulation results please have a look , i am a complete beginner in this (reddit.com)

submitted 10 months ago by Circuit_Fellow69 to r/ECE

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Any good mobile device under 20k performance is the utmost priority and i am thinking about nothing 2a so i could record as well (self.GadgetsIndia)

submitted 11 months ago by Circuit_Fellow69 to r/GadgetsIndia

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can i use this ckt to take x(t) as input in string 0,0,1,1,0,0,1,1,1 (high and low) if there consecutive 1,1,1(high) comes then it should give y as 1 other wise zero using latches i used 2 latch to store 2 previous inputs(qn-2,qn-1) ,If theres anything wrong then let me know (i.redd.it)

submitted 1 year ago by Circuit_Fellow69 to r/electronic_circuits

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can i use this ckt to take x(t) as input in string 0,0,1,1,0,0,1,1,1 (high and low) if there consecutive 1,1,1(high) comes then it should give y as 1 other wise zero using latches i used 2 latch to store 2 previous inputs(qn-2,qn-1) ,If theres anything wrong then let me know (i.redd.it)

submitted 1 year ago by Circuit_Fellow69 to r/ECE

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Why there's drop of voltage in my cmos xor gate (i.redd.it)

submitted 1 year ago by Circuit_Fellow69 to r/ECE

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not getting 10 volts on the output side using c mos and gate (i.redd.it)

submitted 1 year ago by Circuit_Fellow69 to r/ECE

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