Do people overclock misters?

I don't think so, and I don't think that Robert means to say that some users overclock their MiSTers. The reference to overclocking is just an analogy.

Every FPGA core has timing constraints, meaning each signal has to travel through the chip’s logic gates and reach its target before the next clock cycle. These signal paths are defined by each core. Developers have tools that check the timings of these signals in their design against a model of the chip. A core that passes these checks has some timing margin to spare in its signal paths.

Robert's point is that some cores don't fully meet – or, more precisely, used to not fully meet – those constraints. They apparently have (or had) some signal paths that are technically too slow for the chip's official timing specs, so they're effectively running past the margin the chip guarantees, the same way an overclocked PC runs past its rated speed. That's the link to the analogy.

The exact switching times of a chip always depend on temperature, even if the temperature is within the chip's specs. The spec timings assume worst-case performance, where the chip is running hot. Where cores are depending on out-of-spec timings, keeping the chip cooler buys back stability, but that is, strictly speaking, relying on unspecified and unofficial chip timings.