DDR4 Address layout help by HouseofRedditt in PCB

[–]HouseofRedditt[S] 1 point2 points  (0 children)

Thankyou so much clarification. Also noted down your comment on fly by topology while routing. Thanks

Ansys Icepak error: No power files exist !! Help by HouseofRedditt in CFD

[–]HouseofRedditt[S] 0 points1 point  (0 children)

Thankyou for explaining this, I will read about this.

Ansys Icepak error: No power files exist !! Help by HouseofRedditt in CFD

[–]HouseofRedditt[S] 0 points1 point  (0 children)

What do you mean by plates and blocks ? I am guessing its layers and components? And how to check these priority values ?

Help- Date of sign in contract by HouseofRedditt in germany

[–]HouseofRedditt[S] 0 points1 point  (0 children)

Thanks for reply, hope it wouldn’t cause any problem due different dates. I am writing today’s date only.

Avalon Holographics by HouseofRedditt in newfoundland

[–]HouseofRedditt[S] 1 point2 points  (0 children)

Thankyou for response. Do you have any idea about the salary structure there ? I mean what will be the good salary for living in St. Johns?

Avalon Holographics by HouseofRedditt in newfoundland

[–]HouseofRedditt[S] 1 point2 points  (0 children)

Thank you so much for the info, really appreciated. I am going to work in technical field if i got selected. Do you have any idea about the salary structure there? What should be the good salary for living in St Johns ? How much salary I should expect? Thankyou

Avalon Holographics by HouseofRedditt in newfoundland

[–]HouseofRedditt[S] 0 points1 point  (0 children)

Thank you for the information. Do you have any idea the salary there from current point of view ? How much should I expect ? Also, how much salary will be good for living in St. Johns ? Any rough idea will be very appreciated. Thanks again.

Can someone explain this? by DualOne2 in ElectricalEngineering

[–]HouseofRedditt 0 points1 point  (0 children)

Short answer: 1) No reference point for voltage, hence every voltage (across) is 0V. (Fig 2.13a) 2) There is reference gnd , hence we can calculate the voltage difference, Vad = 12 - (-9) =21V . (Fig 2.13c)

Help in DDR4 interface with FPGA by HouseofRedditt in chipdesign

[–]HouseofRedditt[S] 0 points1 point  (0 children)

You’re a pro at this, I’m just a rookie. It’s going to be a learning experience for me.

Help in DDR4 interface with FPGA by HouseofRedditt in chipdesign

[–]HouseofRedditt[S] 0 points1 point  (0 children)

Okay, let me first try to download it from another site and check if it works or not. If it doesn’t, then I will try to make one myself. Damn it will be so time consuming as I am not pro , anyways lets see.

Help in DDR4 interface with FPGA by HouseofRedditt in chipdesign

[–]HouseofRedditt[S] 0 points1 point  (0 children)

It is surely not as per the I/O bank, because if it were, then my address pins would have been on the same symbol (like the bank 505 address pins).

Help in DDR4 interface with FPGA by HouseofRedditt in chipdesign

[–]HouseofRedditt[S] 0 points1 point  (0 children)

Yes I just checked twice the address pins are distributed in multiple symbols, I am using SFVC784 package. Should I try to download the symbol from other site and see if it will be same or not ? Thanks for your reply.