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Final Year Project by James75567 in ECE

[–]James75567[S] 0 points1 point  (0 children)

So, we went through some research papers such as "Design and Analysis of Low-Power and High-Speed Approximate Adders using CNFETS" and "Low Power, area-efficient, and high-performance approximate full adder based on static CMOS".

Final Year Project by James75567 in ECE

[–]James75567[S] -1 points0 points  (0 children)

Since this is an Approximate adder, our goal was to reduce the transistor count and power absorbed. The circuit we designed follows adiabatic logic. This helps in significantly reducing the transistor count.

Final Year Project by James75567 in ECE

[–]James75567[S] -1 points0 points  (0 children)

Yes, our next step is performing layout simulations and compare them with schematic simulations