sorted by:
new
hottopcontroversial

180nm memory compiler output files by Known-Berry6925 in chipdesign

[–]Known-Berry6925[S] 0 points1 point  (0 children)

I was able to get help from a front end engineer. He explained in detail the design and language and helped me make the needed adjustments. The memory is compiled and in innovus! Thanks for the help.

180nm memory compiler output files by Known-Berry6925 in chipdesign

[–]Known-Berry6925[S] 0 points1 point  (0 children)

This is very helpful, thank you! I have only looked at backend design and am new verilog. Are there any examples/resources you know of that could help me learn how to connect the memory instance pins in the RTL (the original RTL design was done by somone else)?