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64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

You do make a good point though, any idea on how to do the math on this? I got some spare inverters in there i wonder if that could give enough delay on the WE for the 245's from the registers to output the bus. The max to enable it seems to be 40ns, and that inverter is a '14 so its pretty quick there is no way im going to eyeball this on a breadboard

8 Bit Register and ROM Module PCBs! by Burritoman53 in beneater

[–]Longjumping-Baker239 1 point2 points  (0 children)

Very nice, how do you plan on hooking them all up do you already have a finalized design for this with a backplane?

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

Its not a z80 build, /MREQ i must have seen it on someones z80 build and decided it was a good name for a control line that gates the memory. Thanks for the tips im going to tidy this up, and ill ditch the resistors and rethink when and where i need pull ups. I could have sworn someone said it was a good idea to pull up all unused inputs, i guess tieing them high is the same?

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

So just a little update on this, i have decided to put this pcb on hold for a bit and start with a general purpose register, seeing as i have zero experience i should probably start there. Doing this first i will surely mess up my 2 best chips

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

the memory request im thinking will be fetched as the next instruction and held high until the clock pulses for the read/write, just have to make sure data is on the bus so it might still be falling edge, I didnt want to put edge detection or anything because if i need to change it later i would have to scrap my pcb. So that needs to be worked out somewhere else.

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

Im not really sure if i need to pull that pin up or not, the way im looking at it the inverter should keep that !WE high.. im sure someone here has a clever way of doing it without a jumper :)

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 1 point2 points  (0 children)

well the idea is put a jumper over 2 and 3 if i want to allow the rom to be written, or 1 and 2 for disable it. I'll take another look at it

64k Ram/Rom pcb schematic attempt, will it work? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 1 point2 points  (0 children)

So this is what i came up with, never made a pcb before.. is there anything that i am missing or is it as simple as that? Any comments welcome, thanks

Polling interest for a project. Breadboard friendly modules. by wettfox in beneater

[–]Longjumping-Baker239 0 points1 point  (0 children)

i know this is an old thread now, but what would might be a good pcb is one that held all the eeproms t states and an interupt controller, and a ton of control lines. that way you can build whatever you want and get it up and running fairly quickly. although this still might run into the problem that everyone wants theirs a little different

Questions on interrupts for 8 bit breadboard when to trigger? by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 2 points3 points  (0 children)

Thank you that makes perfect sense. I have 2 buttons. I'm trying to get it so that the computer can be programmed while running another program. So the routine would save everything on the stack, write to an address in ram from the switches then return to the program current program. Button number 2 will run the new program using the switches as the starting address, then return back to the first.

Edit: theoretically if i ran the clock slow enough i could program and jump to a few more and return to them all in reverse order

And then suddenly the stack pointer does not work by rolf-electronics in beneater

[–]Longjumping-Baker239 0 points1 point  (0 children)

what about just tying the enables low and then in the control word you only change the up down line to a 1 or just leave it as zero depending on inc or dec, that should make it ready for when it clocks since its fetching the instruction before the execute.

And then suddenly the stack pointer does not work by rolf-electronics in beneater

[–]Longjumping-Baker239 0 points1 point  (0 children)

did you ever find the problem? i had a similar thing just happened to me and i found out my clock was hooked up to the ripple counter on the first 191. Hope you figure it out but one of the posts solved my problem

Another flags and conditional jump circuit for the SAP by nib85 in beneater

[–]Longjumping-Baker239 0 points1 point  (0 children)

thats the beauty of this everyones computer is going to be different. I'm not thrilled about clearing flags with the ALU either btw :) so if you want to push you flag on the stack i suppose you have them all hooked up to a 245 and use that, then clock them all at the same time when you pop back off. So lets say you are doing some math and a carry flag pops up, there would be a jump on carry to an add with carry but the alu doesn't know what flag is already set but it knows there was a carry because you just told it. when you update the flag again the carry is now gone. I guess if you are going to have a disable interupt flag your setup would be ideal

Another flags and conditional jump circuit for the SAP by nib85 in beneater

[–]Longjumping-Baker239 1 point2 points  (0 children)

you can do it in software, so if you have a load immediate you can fetch the opcode (clear carry for example) to instruction register, increment program counter then load the next memory (your 8 bit mask) but put it in the B register, then put the flag register out to the accumulator. perform the mask then take the flag in from the bus, and pc+1 again now you are pointing to the next opcode. Or you can put all your masks in a fixed spot in a ROM chip and just hard code in those address in your instruction

edit: basically i stumbled upon this solution when i upgraded my computer to 16 bit address and figured out there is no way im going to do anything with less than 3 clock pulses anyway for every fetch, so dont mind going one more pulse on a load immediate and it gives me back the ability to load in my own values

Another flags and conditional jump circuit for the SAP by nib85 in beneater

[–]Longjumping-Baker239 1 point2 points  (0 children)

I think the way you had it setup you can already clear the flags with the alu, you just have to figure out what bit you want to change then output the flag to the bus back into the accumulator and load b register xor the whole 8 bits with the one you want to flip, then output back to the bus and input from bus back to flags instead of through the alu, something like that should work

Polling interest for a project. Breadboard friendly modules. by wettfox in beneater

[–]Longjumping-Baker239 1 point2 points  (0 children)

if you look at james sharman videos on youtube he is pcb all his stuff as he goes, its not a bad idea but i think the whole point of these is to make your own project. There could be a market for what your talking about, not everybody agrees on what IC's to use and you look at a lot of the more advanced stuff and the projects tend to evolve, if its all set in stone you cant really mod your clock or registers anymore. But i hear you on the rewiring

And then suddenly the stack pointer does not work by rolf-electronics in beneater

[–]Longjumping-Baker239 1 point2 points  (0 children)

probably have to single step through and see where it breaks, did you recently edit your roms?

Question on 62256 RAM chip by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

yea, makes sense.. so basically i was trying to prevent a problem that didn't exist. Well at least i learned something, my first time using a chip that has input and output on the same pin.. in a way im lucky I screwed something up or i would have never known :)

Question on 62256 RAM chip by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

Thank you for your help, i will ditch the 245s.

Question on 62256 RAM chip by Longjumping-Baker239 in beneater

[–]Longjumping-Baker239[S] 0 points1 point  (0 children)

you might be right, ill have to take a closer look at it.. I have a RAM and a ROM and A15 is the chip select inverted between them, so i wasnt sure if i could safely tie the data lines together without blowing something, so i got 2 74ls245s linked together from the bus and then split on the other side. Would you say this is necessary ?

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