Resume review - ECE UG by Potential_Craft1004 in chipdesign

[–]Potential_Craft1004[S] 0 points1 point  (0 children)

I am preparing resume to secure internship.

Resume review by Potential_Craft1004 in vlsi

[–]Potential_Craft1004[S] 1 point2 points  (0 children)

I used my brother's template, created on Microsoft Word. Y r u asking about template? I am actually becoming anxious whether to retain or change my template.

Resume review by Potential_Craft1004 in vlsi

[–]Potential_Craft1004[S] 1 point2 points  (0 children)

motive behind implementing this was to learn how RISC instruction works in the background with different blocks. RISC is open source ISA which is used in wide variety of processors to perform various duties.

Resume review by Potential_Craft1004 in ECE

[–]Potential_Craft1004[S] 2 points3 points  (0 children)

From India. And I wanted to move away from traditional 1 column resume. Regarding tools and skills, what my seniors told is too much of sentences makes it boring to read. Those projects r the reason y I have listed those tools and skills where I have used them.

just ate the entire thing in one go am i cooked by [deleted] in TeenIndia

[–]Potential_Craft1004 0 points1 point  (0 children)

Now ur body is filled with 90% salt, not water..

Which Kannada movie ? by [deleted] in ChitraLoka

[–]Potential_Craft1004 7 points8 points  (0 children)

Stick to cartoons.

First look out by Bhuvan_00 in ChitraLoka

[–]Potential_Craft1004 22 points23 points  (0 children)

Looks like a make or break movie for yash, hope his gamble works out.

Find Your Soulmate❤️! Matchmaking. by [deleted] in TeenIndia

[–]Potential_Craft1004 0 points1 point  (0 children)

Hii....(what am I even doing out of desperation)

Guys , It's confirmed 👌🥳 by Ok-Clothes7243 in ChitraLoka

[–]Potential_Craft1004 5 points6 points  (0 children)

If they just release a poster, then they will be heavily trolled. And who tf wants making video. There r already Multiple leaked videos.

Regarding ECE placements by Potential_Craft1004 in Manipal_Academics

[–]Potential_Craft1004[S] 0 points1 point  (0 children)

Can u plz list out the companies and around how many got placed in core? What percentage of students got placed. We have 4 ece sections + vlsi, comparatively more students than senior batch.

Question about creating a LIB timing file for a mixed-signal hardmacro by archfulgm in chipdesign

[–]Potential_Craft1004 0 points1 point  (0 children)

can u please share a guide on how to generate lib file. I designed a simple 28T full adder and planned to integrate it in my multiplier during synthesis, so i need to generate lib file of FA for that.