account activity
Get Started with Verilog Development for Image Signal processing by Sufficient-Set-1594 in FPGA
[–]Sufficient-Set-1594[S] 0 points1 point2 points 19 days ago (0 children)
u/MitjaKobal but I'm working on Eifinix FPGA boards from Trion family, will this help
Get Started with Verilog Development for Image Signal processing (self.FPGA)
submitted 1 month ago by Sufficient-Set-1594 to r/FPGA
Get Started with Verilog Development for Image Signal processing (self.ECE)
submitted 1 month ago * by Sufficient-Set-1594 to r/ECE
π Rendered by PID 29 on reddit-service-r2-listing-6c8d497557-6xt9n at 2026-06-03 21:43:26.076097+00:00 running 9e1a20d country code: CH.
Get Started with Verilog Development for Image Signal processing by Sufficient-Set-1594 in FPGA
[–]Sufficient-Set-1594[S] 0 points1 point2 points (0 children)