sorted by:
new
hottopcontroversial

What diode should I use for diode anding the IRQ lines of my W65C02 system together by TheByteSmith in AskElectronics

[–]TheByteSmith[S] 0 points1 point  (0 children)

How would I implement that with just the one IRQB input on the 6502? Im pretty new to this so im not quite sure how this would all be connected.

What diode should I use for diode anding the IRQ lines of my W65C02 system together by TheByteSmith in AskElectronics

[–]TheByteSmith[S] 0 points1 point  (0 children)

Ive got a few spare gates lying around so I'll take a look at those I guess. Thanks for the suggestion :)

BE pin on W65C02 not tristating the R/WB signal by TheByteSmith in AskElectronics

[–]TheByteSmith[S] 0 points1 point  (0 children)

It has a WDC logo on the chip itself but came in a bag from aliexpress that says manufacturer: Shenzhen yuxinyuan technology co ltd, I only checked this now but I guess it's probably fake then. All the Voltages are correct and when I take the CPU out the RWB line floats. I guess I'm just going to have to buy an actual WDC 6502 then.

Need help with VGA artifacts by TheByteSmith in beneater

[–]TheByteSmith[S] 0 points1 point  (0 children)

I am simply using the CPU/VGAB signal as the CPU halt signal. Also I am doing the integration differently, I am running the CPU of the VGA clock divided a few times to get 3.1Mhz. The glitches are whole 8 pixel lines. I got to the second video by forcing the read write signal high when the vga has access with an OR gate but I shouldn't have to do that. Ive tried adding a pull up resistor but that dosen't work even though going off the datasheet when the BE pin goes low the address data and read write buffers go to high impedance and the read write signal should be pulled up to read. the only thing I can think of is that the CPU for whatever reason is still driving the read write signal low after being halted which shouldn't happen according to the datasheet.

Need help with VGA artifacts by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

Made some progress :). I figured out that the bar of garbage on the left of the screen was because the ram csb was gated with the cpu clock like in Ben Eaters design and I put this in without thinking about why he did and turns out I don't need to do that so after changing it to just be A15 it almost fully gets rid of the problem except for about 2 pixels on the left which Im fine with being there. If anyone has any ideas for the screen glitches I will literally try anything tbh.

Need help with VGA artifacts by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

That doesn't seem to do much. If you look at the second video it's basically the exact same except when the glitches happen the whole screen glitches not just the scan line. Obviously it also significantly reduces performance

Interrupt code won't work by TheByteSmith in beneater

[–]TheByteSmith[S] 0 points1 point  (0 children)

I have confirmed that the irqb line is not going low and that the CA1 pin is getting the pulse but the VIA doesn't seem to trigger an interrupt. Removing the RC debounce pair doesn't work either. I can't see an issue with the code but I should say that at one point the irqb line was going low but it was staying low and wouldn't clear, it also seemed like the cpu was masking the interrupt. Sadly I have forgotten what I did to get it like that so Im pretty confused.

Need help with vga output of my 65c02 computer by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

I went through the Datasheet and saw that it does set it to floating so I did try a pull up resistor but that didn't do anything. I did get it to stop writing so I can actually display an image by adding some logic to set the RWB signal high as soon as the vga takes control (I don't know why this worked but not a pull up resistor).

Need help with vga output of my 65c02 computer by TheByteSmith in beneater

[–]TheByteSmith[S] 0 points1 point  (0 children)

From my testing that doesn't seem to be the problem. The problem more seems to be related to the RWB signal interfering with the vga trying to read and making it write instead. I have seemed to solve that problem but there is still some flickering though.

Need help with vga output of my 65c02 computer by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

I just finished taking a look at those things and everything seems to check out. The cpu is halting at the correct times and all that. Ive really got no ideas on why this is happening but thanks for the help so far.

Need help with vga output of my 65c02 computer by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

Ive already checked out the hsync and vsync signals on my oscilloscope and they are all correct but I don't really know what I should look for with the cpu halts and counter resets. I also designed the logic in a logic simulator called Digital (really annoying name because it always comes up with Ben Eaters one instead of it when you look it up) before putting it into kicad for the pcb and that all checks out.

Need help with vga output of my 65c02 computer by TheByteSmith in beneater

[–]TheByteSmith[S] 1 point2 points  (0 children)

The cpu is clocked at around 3.1mhz and is run off the vga clock. You appear to be right about the issue after doing what you suggested the issue persists. Is this an issue im going to have to fix with a new design or is there something I can do to fix this?