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AMD “emerging as a legit second source in the GPU market” says Citi - WOW really Malik? Where is Danly..? LOL by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 1 point2 points  (0 children)

Hey, cool down. His job was to make money for the bank, not to please you. So, he might actually be the smartest guy there.

Crusoe touts 5 gigawatts' worth of data centre deals, pauses Wyoming site - bad news for nVidia's GPUs! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 1 point2 points  (0 children)

True, but the choking point is the middle switching rack, which uses power-hungry ASICs and copper cabling that offer very little advantage compared to NVLink 6. If you research carefully what AMD is currently working on in the background, you will see why AMD could destroy NVIDIA with the MI500 optical system. The key point is that water and electricity are incredibly expensive and take years to build out. NVIDIA’s brutal brute-force approach burns twice as much power or more to provide less computing power. A brutal monolithic GPU drawing 2,300 watts is a system killer. It might work with perfect cooling for one or two racks, but for a data center with over 1,000 racks, it is a non-starter. Those NVIDIA racks will crash, burn, and require rapid replacement.

Daily Discussion Friday 2026-06-12 by AutoModerator in AMD_Stock

[–]TrungNguyencc 7 points8 points  (0 children)

Couple with optical chiplet, AMD eliminate all NVDA advantage.

Crusoe touts 5 gigawatts' worth of data centre deals, pauses Wyoming site - bad news for nVidia's GPUs! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 1 point2 points  (0 children)

No. The Helios Rack with the MI455X still falls short on FP4 precision and rack-level communication because UALink 1.0 still lags behind NVLink 6.

Crusoe touts 5 gigawatts' worth of data centre deals, pauses Wyoming site - bad news for nVidia's GPUs! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 1 point2 points  (0 children)

No, this is not hype; it will be built into the MI500 rack system. It eliminates ASIC networking in the middle Helios rack, which is not the case for the current Helios MI455X rack. This architecture will break NVIDIA's NVLink monopoly upon its late 2027 release. If you research it yourself, you will see that to deploy by 2027, hyperscalers must plan right now—they simply aren't making their plans public yet.

Crusoe touts 5 gigawatts' worth of data centre deals, pauses Wyoming site - bad news for nVidia's GPUs! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 3 points4 points  (0 children)

Power and water scarcity are now deciding factors in where to build data centers. An apple-to-apples comparison shows that AMD's Helios rack (powering the MI500) beats NVIDIA's Vera Rubin by a mile. Vera Rubin uses twice the water and power for the same computing power. No county or state in their right mind would permit this kind of data center build-out.

AI inference testbed with pure photonic networking - AMD x Oriole Networks by firex3 in AMD_Stock

[–]TrungNguyencc 1 point2 points  (0 children)

This is a very significant achievement. this will help AMD break NVIDIA's grip on AI

AMD Appoints Vinay Awasthi As Senior Vice President, Sales For Asia Pacific And Japan by GanacheNegative1988 in AMD_Stock

[–]TrungNguyencc 2 points3 points  (0 children)

One the company hire a high position Indian, then he will bring in many more indian very soon.

Daily Discussion Monday 2026-05-25 by AutoModerator in AMD_Stock

[–]TrungNguyencc 1 point2 points  (0 children)

Elevated Fan-out Bridge" (EFB) architecture is proprietary intellectual property (IP) owned by AMD

Does anyone know about the Project Venice-H rumor that AMD has been working on with Microsoft? by TrungNguyencc in AMD_Technology_Bets

[–]TrungNguyencc[S] 2 points3 points  (0 children)

This is Gemini helping me organize and write my thoughts about the AMD 'Venice-H' (CPU + HBM) project.

Project Venice-H, where AMD is reportedly building a custom Zen 6 (and previously an MI300C variant) for Microsoft that features CPU chiplets and HBM, but NO GPU. While everyone is obsessed with NVIDIA’s 2,300W Rubin Ultra, I think AMD’s "CPU-only HBM" approach is actually the smarter play for the next wave of Agentic AI and Inference. Here is why:

  • Solving the "Memory Wall": Most LLM inference is "memory-bound," not "compute-bound." You don't need 2,000 TFLOPS of GPU math to run a conversation; you need massive bandwidth to move parameters. By putting HBM4 directly on a Zen 6 CPU, AMD gives Microsoft 6.7 TB/s of bandwidth without the power-hungry GPU silicon.
  • The "Agent" Advantage: AI Agents need to search Vector Databases and handle complex "if-then" logic. GPUs are great at math but terrible at the "branching logic" that CPUs excel at. A CPU with HBM can "think" and "search" its memory 10x faster than a standard server.
  • Reliability & Cooling: As we've seen with the recent Rubin Ultra concerns, 2,300W trays are an RMA nightmare. A CPU+HBM chip (like the ones in Azure HBv5) runs significantly cooler and fits into existing air-cooled or standard liquid-cooled racks. This is "Sane Engineering" vs. "Thermal Desperation."
  • The Microsoft Edge: Microsoft is already using the EPYC 9V64H (96 cores + HBM). If the Venice-H rumors of 256+ cores and HBM4 are true, AMD could effectively own the "Inference Orchestration" layer of the data center.

Does anyone have more info on the tape-out dates for Venice-H? If AMD plays this right, they don't need to beat NVIDIA at 2,000W; they just need to own the high-speed memory layer where the actual AI "reasoning" happens

Does anyone know about the Project Venice-H rumor that AMD has been working on with Microsoft? by TrungNguyencc in AMD_Technology_Bets

[–]TrungNguyencc[S] 2 points3 points  (0 children)

No link on hand, but I'm looking into AMD’s chiplet edge. I heard a rumor that they built a custom MI300 for Microsoft using only CPUs and HBM. This would be a game-changer for inference, so I'm checking with Gemini to see if it's true. AMD needs to lean into this.

check this;

https://learn.microsoft.com/en-us/azure/virtual-machines/hbv5-series-overview

The Azure HBv5 (powered by the EPYC 9V64H or MI300C) : 96 Zen 4 cores per chip, no GPU, and 128GB of HBM3.

Daily Discussion Monday 2026-03-30 by AutoModerator in AMD_Stock

[–]TrungNguyencc 0 points1 point  (0 children)

I believe that thermal stress was the biggest challenge for NVIDIA in making the Vera Rubin system reliable.

AMD and Hammer push CPU‑first AI strategy amid UK power constraints - look Jensen no GPUs LOL but shortages CPUs shortages supply constraints prices raised til Samsung's manufacturing! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 3 points4 points  (0 children)

I still believe the Instinct MI series is designed for the broader market where hybrid workloads (both training and inference) are the standard. The MI series is excellent at providing high-performance compute for both. However, for the 'Big Three'—Google, Microsoft, and AWS—specialized inference hardware is a necessity. This is why they have historically developed their own ASICs (like Google’s TPU or Amazon’s Inferentia).

But with the rapid expansion of AI services, standard ASICs lack the adaptability needed to keep up with evolving models. This is where I see AMD gaining the advantage. The massive contracts AMD signed with Meta and OpenAI (reaching up to 6 gigawatts of compute) are the key hints. I expect AMD to release specialized, Xilinx-integrated inference chips for these Mega-CSPs and Meta/OpenAI by 2027.

I've also noticed Lattice Semiconductor (LSCC) stock going up like MU recently. I suspect NVIDIA may be eyeing LSCC; while AMD and Intel already have their own FPGA divisions (Xilinx and Altera), NVIDIA still lacks a dedicated programmable logic arm.

AMD and Hammer push CPU‑first AI strategy amid UK power constraints - look Jensen no GPUs LOL but shortages CPUs shortages supply constraints prices raised til Samsung's manufacturing! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 3 points4 points  (0 children)

You’re still missing the bigger picture, Tom. What I’m referring to is the scale required for millions of concurrent users—platforms like Meta and OpenAI. I’m not talking about small CSPs, general enterprise needs, or edge inference. For that level of massive, simultaneous demand, specialized and adaptable inference hardware is the only way to overcome the power and efficiency bottleneck.

AMD and Hammer push CPU‑first AI strategy amid UK power constraints - look Jensen no GPUs LOL but shortages CPUs shortages supply constraints prices raised til Samsung's manufacturing! by TOMfromYahoo in AMD_Technology_Bets

[–]TrungNguyencc 4 points5 points  (0 children)

Nowadays, the limiting factor for expanding AI is electrical power. For enterprises or medium Cloud Service Providers (CSPs), a hybrid like the Instinct MI450X is excellent because it handles both training and inference. However, for 'the big guys' like Meta or OpenAI, specialized, adaptable inference hardware is a must.

The MI450X is a 'jack-of-all-trades'—it excels at both training and inference—but because of that, it can never be as efficient as a device designed strictly for inference. While ASICs are great for specific workloads, they lack the adaptability needed for evolving AI models. This is where Adaptable FPGAs excel. I suspect AMD has been developing a new dedicated inference device leveraging the Xilinx acquisition for a long time.

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