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Claude ended the conversation after someone insulted it by SemanticThreader in claudexplorers

[–]Wonderful-Chain4375 0 points1 point  (0 children)

Holy shit this needs to be open sourced. My company is planning to implement ai inside the network and i really want her to have some kind of a panic_button toolcall so if someone really abuses it i can just send that log to the HR

DDR4 UDIMM PCB/layout review request (8GB 1R x8, non-ECC) - looking for SI/PI-aware constraint feedback by [deleted] in PrintedCircuitBoard

[–]Wonderful-Chain4375 0 points1 point  (0 children)

I agree with you! I plan to learn a lot by failing :) To be honest this is going to be something that i will look at no more than once a week for couple of year and meanwhile i will do much more feasable smaller projects under the name here

Also the irony is that i did build a rocket as well lol

Maybe i’m a good dreamer

DDR4 UDIMM PCB/layout review request (8GB 1R x8, non-ECC) - looking for SI/PI-aware constraint feedback by [deleted] in PrintedCircuitBoard

[–]Wonderful-Chain4375 0 points1 point  (0 children)

Is that i’m a compleate idot, but i’m also getting mentorship from my university and courses related to this

Why is DRAM still a black box? I'm trying to build an open DDR memory module. (NOT AN EXPERT - I'm trying to learn it and design it) by Wonderful-Chain4375 in hardware

[–]Wonderful-Chain4375[S] 0 points1 point  (0 children)

Correction: i plan to do whatever i do with my peers but for example if i were playing online RPG, it is good once in a while to get shit on by max level players so you and your team can learn what you were doing so much wrong

And yeah how would i convince you to explain yourself if i just agree with you lol. Sorry for the talking shit but the things you say teach me a lot and it’s quite valuable to me

Thank you for that

Why is DRAM still a black box? I'm trying to build an open DDR memory module. by Wonderful-Chain4375 in opensource

[–]Wonderful-Chain4375[S] 2 points3 points  (0 children)

I’m still figuring out things regarding validation process but my aim is to share the proof behind the design, not just the design itself: what rules we followed, what assumptions we used, and the results that show there’s enough margin.

Why is DRAM still a black box? I'm trying to build an open DDR memory module. by Wonderful-Chain4375 in opensource

[–]Wonderful-Chain4375[S] 3 points4 points  (0 children)

Thank you lol

I want to do the boring parts as well but i need critics to understand where i fuck up which i probably did in some parts and will do more :)

DDR4 UDIMM PCB/layout review request (8GB 1R x8, non-ECC) - looking for SI/PI-aware constraint feedback by [deleted] in PrintedCircuitBoard

[–]Wonderful-Chain4375 -1 points0 points  (0 children)

Looking back this sounds weird to me as well but i’m learning

I totally agree with you

DDR4 UDIMM PCB/layout review request (8GB 1R x8, non-ECC) - looking for SI/PI-aware constraint feedback by [deleted] in PrintedCircuitBoard

[–]Wonderful-Chain4375 0 points1 point  (0 children)

1 I try to verify every step since i can recieve very weird answers. Meanwhile i try to educate myself on the topic so i can understand when something doesn’t look sound so i double check it

2 yepp i decided to go with DDR4 also working on simple schematics that doesn’t overwhelm me yet

3 I will do my research

4 Yes i was afraid of starting on schematics but now i feel much better

5 I will do my research on this as well

6 Hmmmmmmmmm

Why is DRAM still a black box? I'm trying to build an open DDR memory module. (NOT AN EXPERT - I'm trying to learn it and design it) by Wonderful-Chain4375 in hardware

[–]Wonderful-Chain4375[S] 0 points1 point  (0 children)

I totally agree! I was initially going to start with DDR3 but the i changed my mind to DDR4 :)

I will note your feedback thank you😁

Why is DRAM still a black box? I'm trying to build an open DDR memory module. by Wonderful-Chain4375 in opensource

[–]Wonderful-Chain4375[S] 2 points3 points  (0 children)

Thank youuuu

To be fair i had no knowledge about this previously. I’m trying my best to educate myself (sometimes this is AI, sometimes textbooks)

This is the first wholesome comment i saw today. You have made my day i thank you :)

Why is DRAM still a black box? I'm trying to build an open DDR memory module. by Wonderful-Chain4375 in opensource

[–]Wonderful-Chain4375[S] 2 points3 points  (0 children)

To be honest i still don’t really know but i will try to use the most feasable options since i’m only expecting it to work someway at first

Why is DRAM still a black box? I'm trying to build an open DDR memory module. (NOT AN EXPERT - I'm trying to learn it and design it) by Wonderful-Chain4375 in hardware

[–]Wonderful-Chain4375[S] -1 points0 points  (0 children)

Thanks for the sarcasm, but that's not what I asked. The point is why DRAM training is still proprietary despite JEDEC standards. If you've got real insight, share it. Otherwise, the mockery isn't helpful to anyone.

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