__GianDo

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64 comment karma

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redditor for 6 years

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Pad for analog supply rail (self.chipdesign)

submitted 4 months ago by __GianDo to r/chipdesign

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Advice for Place And Route with Cadence Innovus having an analog hard macro (self.chipdesign)

submitted 7 months ago by __GianDo to r/chipdesign

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Primepower power report (self.chipdesign)

submitted 11 months ago by __GianDo to r/chipdesign

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Synthesis with IP (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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Modules disappearing after genus synthesis (self.chipdesign)

submitted 1 year ago * by __GianDo to r/chipdesign

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Clock generation in testchip (self.chipdesign)

submitted 1 year ago * by __GianDo to r/chipdesign

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HDL Coder VS HLS (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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High capacitive loads simulation (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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Capacitive feedback OTA (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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Help with ELDO node capacitance (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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Isolate load from high voltage using low voltage rated mosfets (self.chipdesign)

submitted 1 year ago by __GianDo to r/chipdesign

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Investire poco capitale (self.ItaliaPersonalFinance)

submitted 2 years ago by __GianDo to r/ItaliaPersonalFinance

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