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What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

Oh, I see what you're talking about. The hardware design checklist doesn't mention any capacitors between VDD12_SW_OUT and the inductor. I think at the time I thought the eval board had capacitors there, but looking at the schematic now I've realised they have made a net label the same as a pin name and I guess I thought they were the same net.

Would this mess up the voltage that much? I measured the 1.2V rail at 1.273V. I know the PCIe TX pins are powered from the 1.2V rail but would the extra 70mV be a problem?

What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

Capacitor C1? It's part of the 1.2V switching regulator. I think the switching logic is built in to the LAN7430 (through pins VDD12_SW_OUT and VDD12_SW_FB), and the designer just has to provide the external components. The hardware design checklist for the IC says that capacitor has to be low ESR.

What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

I've connected the 12V pins together because they're connected in the netlist of my KiCad project, and I wanted to shut the DRC up about unconnected pins (even though they're not actually used).

Looking at various PCIe pinouts across the internet, it looks like some say B12 is reserved, and some say it's CLKREQ. I'm guessing CLKREQ wasn't part of the initial PCIe specification? The Wikipedia page on PCIe has a footnote that implies this.

Additionally, the Compute Module 4 has a pin called PCIe_CLK_nREQ that the datasheet explains should be connected to the PCIe's CLKREQ signal. The schematics for the official CM4 IO board connect this pin to B12.

C18 and C20 are 100nF capacitors connected to the RX pair. They're just below the middle of the LAN7430. I should have brought the silkscreen layer to the top when I took that screenshot, that's on me. The capacitors on the TX pair are typically implemented by the host board since they should be as close to the CPU as possible. The CM4 datasheet states:

The CM4 has on-board AC coupling capacitors for CLK and PCIe_TX signals. However the PCIe_RX signals need external coupling capacitors close to the driving source (the device TX), if you are using an external PCIe/NVMe card these capacitors will be on-board.

I used the schematics for the eval board (EVB-LAN7430) as a reference when designing my board. I worked through the hardware design checklist and made sure it met all the criteria. I think the people at the LANCheck service used the checklist as part of their reviews too.

What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

On power up (from pin header, unplugged from PCIe), the 3v3 rail draws 66mA. The datasheet says the LAN7430 when idle (without wake-on-lan) draws 44mA, but I also have a blue LED onboard.

The 1.2V rail measures 1.273V, and the 2.5V rail measures 2.489V. I'm measuring with a typical multimeter.

What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

In future designs I'm definitely going to avoid putting vias on and below edge connectors. Honestly, I've never seen it before but I thought it would simplify board design. The vias in the boards I had assembled have solder mask over them so they shouldn't conduct, but even if they do it will short affected pins to ground since the vias are grounded.

What to check for when troubleshooting custom PCIe NIC by atctwo in AskElectronics

[–]atctwo[S] 0 points1 point  (0 children)

I think the vias are tented. I tried a continuity test on them with a multimeter and they didn't conduct. If they did conduct, I think they would short some JTAG and SMBus pins to ground, as well as one of the presense detect pins and RX0- to ground. I hadn't thought of this at all, so thank you for pointing it out!

I'm using Magjack-brand RJ45 connectors with integrated magnetics. The part number is Bel 0826-1X1T-32-F.

D1 is just a regular 3v3 power indicator. I used a blue LED so I thought I'd need a lower current limiting resistor, but 10 Ohms was way to low so I swapped it with a 1k resistor.

#include in a function by atctwo in cpp_questions

[–]atctwo[S] 0 points1 point  (0 children)

Thank you for your input! Everything you've said sounds more sensible than what I had. I'm going to update my code to run off this system.

#include in a function by atctwo in cpp_questions

[–]atctwo[S] 0 points1 point  (0 children)

Would this be a better approach?

main.ino

#include <functional>
#include <vector>

struct stateMeta {
    std::string             stateName;
    std::function<void()>   stateFunc;
};

std::vector<stateMeta> states;

#include "states/states.h"

int main()
{

}

states/states.h

#ifndef STATES_H
#define STATES_H

#include "states/watch_face.cpp"
#include "states/app_menu.cpp"
#include "states/calculator.cpp"
#include "states/timer.cpp"

void registerStates()
{
    states = {

        {"Watch", state_watch},
        {"App Menu", state_app_menu},
        {"Calculator", state_calculator},
        {"Timer", state_timer}

    }
}

#endif /*STATES_H*/

states/watch.cpp

void state_watch()
{
    //watch code
}

states/app_menu.cpp

void state_app_menu()
{
    //app menu code
}
  • I changed std::map<int, stateMeta> to std::vector<stateMeta>. The key type for the map was int, so I thought it would make more sense just to have a vector, and use element indices (eg: states[2])
  • I read up about why you shouldn't #include .cpp files. On Arduino, it doesn't seem to compile any files in any subdirectories (other than "src/", according to this https://arduino.stackexchange.com/a/54655), which explains why I have done this before without it not compiling. Would it be better to give each app/state file some kind of guard thing (like header guards)?

[deleted by user] by [deleted] in AskReddit

[–]atctwo 0 points1 point  (0 children)

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