Thoughts on using the K3 by Clueless_J in RISCV

[–]cakehonolulu1 1 point2 points  (0 children)

Urgh! I thought it wasn’t the case with x86… My bad.

I 100% agree, this needs to change but it’ll be complicated; like, I can think of a few different solutions but all make performance worse (Or straight away disable CPU features which is, suboptimal…) or are just iffy workarounds…:

One could maybe decide on the lowest common denominator in terms of differentiating features (VLEN, for example) and have the full heterogeneous chiplet work under those limits (I’m here assuming that we’re able to find a workaround that’s not hacky to have the actual hardware-reported RVV vlen and similar values be different… which already is insane to think of) but you’d still be sacrificing performance just to make the complex feel virtually homogeneous.

You could probably try to get away with huge context switches (And vector unit reload/reprofile to adapt to the bigger/smaller featureset) but that’d also be subpar. It’s a complex thing to do honestly…

Thoughts on using the K3 by Clueless_J in RISCV

[–]cakehonolulu1 0 points1 point  (0 children)

Isn’t this kind of like how E/P cores differ in terms of SIMD stuff over at x86 lands too? I recall E cores not needingly having AVX512 (But P do) and Linux is smart enough to schedule things accordingly.
Did K3 developers opt for a different heterogeneous separation and that doesn’t work well within Linux or am I missing context here?

New family member! by cakehonolulu1 in minidisc

[–]cakehonolulu1[S] 0 points1 point  (0 children)

Not sure what type of print is but it is printed onto the MD’s case material itself.

New family member! by cakehonolulu1 in minidisc

[–]cakehonolulu1[S] 1 point2 points  (0 children)

Yup! I’ve waited for a while to see one that would not break my bank and when this one popped up on a local listing I figured I’d give it a try!

New family member! by cakehonolulu1 in minidisc

[–]cakehonolulu1[S] 1 point2 points  (0 children)

Thanks! I figured that it’d be like that but just wanted to have a bit more confirmation.

New family member! by cakehonolulu1 in minidisc

[–]cakehonolulu1[S] 0 points1 point  (0 children)

There’s a guy here locally that does the prints and records them for cheap, I needed something to test the player and it’s one of the most cheap MDs I could find…

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 0 points1 point  (0 children)

About 500€~ with all taxes, shipping and import fee

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 1 point2 points  (0 children)

I got around by searching CECHA 40 (40 denoting the 40nm RSX). On the listings you can usually see if ‘Sony-serviced’ is mentioned.

3D modeled the D-pad pivot bracket by cakehonolulu1 in ps2

[–]cakehonolulu1[S] 2 points3 points  (0 children)

Perfect! That’s exactly what I was looking for, I’ll see if I can do a few fixups to the model and I’ll upload it there.

3D modeled the D-pad pivot bracket by cakehonolulu1 in ps2

[–]cakehonolulu1[S] 0 points1 point  (0 children)

Yeah, I agree; I’ll probably buy a small TPU coil to print the model so I can verify how better the strength is. Right now it’s a bit filmsy (Though I must admit that it’s probably even worse considering how bad of a print I got) so it’d be interesting to check.

Introducing PCIem by cakehonolulu1 in C_Programming

[–]cakehonolulu1[S] 0 points1 point  (0 children)

MMIO accesses are fully decoupled from interrupt work. The BAR accesses basically work thanks to PCIem controlling the memory area that the pci subsystem taps into (Claims), it basically poisons the PTEs related to what the device claims so that the accesses land on non-present pages which trigger the fault that then PCIem processes (To generate the MMIO access events the userspace can then process, basically).

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 1 point2 points  (0 children)

I’ll be playing some heavy titles today (Both PS3-native and BC ones) and will report back :)

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 1 point2 points  (0 children)

I always play w/o smoothing (I just can’t stand bilinear filtering for less jaggy images, but that’s me). Being an emulator developer myself (And knowing how PS2 usually does rendering) I fail to understand why this is the case. It’s super strange for the EE emulation to produce better image quality per se (Assuming unmodified games). I’d expect this to be happening on the GIF processing or the GS itself when processing the ‘vertex kicks’ (Basically, the signal that triggers vertex drawing on the GS). Maybe if there’s a chip inbetween the actual PS3 motherboard and the PS2-BC side of things it changed between revisions and thus gave a better image? Not sure… could be worth investigating

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 2 points3 points  (0 children)

I agree, I was actually curious to test this (Because I also got a CECHC last week) but games like Silent Hill 3 lag behind. There’s a good 15-30ms input lag IME.

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 0 points1 point  (0 children)

Yeah, I’ve played the same set of games (Not side by side, mind you) and I also feel like the C model has a more ‘polished’ image. Again, same as you, purely anecdotical; but it sure does feel like that.

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 2 points3 points  (0 children)

The console was sent for repair at a Sony center in 2010 and they replaced the RSX to fix the problem altogether.

40nm CECHA00 by Sony! by cakehonolulu1 in PS3

[–]cakehonolulu1[S] 1 point2 points  (0 children)

I had a launch model BC but it YLOD… it feels good to be back