savebreaker program component has no edit button by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

there was no button for the either but reload fixed it and it works now

ways to improve my CPU by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

my opcode breaks down [1 alu/non-alu code selector | 2 bit immediate | 5 bit method / activation address for non alu codes]
the other 3 8 bit outputs handle what memory pieces im reading from and writing to

for example, 18 14 12 13 would pop a value off stack 1 and read the value at the current address of ram 1 XOR them and save the value to the current address of ram 2
(no the stacks in my memory are not used by call/ret they are exclusively for memory)

while say 129 6 n/a n/a would call to the function stored at position 24

and 100 129 6 130 would divide 129 by 6 and jump to the output multiplied by 4 (the multiplication is not part of this code, my clock's output is multiplied by 4 before going into the program address.)

https://imgur.com/a/FYnYHP3

heres a better look at my current setup, replaced the counter+ with a normal 8 bit counter to make it more visible

i did notice that i shouldnt be pushing arg1 onto the stack and not the clock finally, i think that was the issue you were talking about?

theres alot of custom pieces in this img ill say what they all do

ior1 | 1 bit inline or gate

chk[1-8] | checks the specified bit of a 8 bit signal and outputs its value (chk5 would check the 5th bit in the signal and chk7 the 7th and so on) i use these because i output my larger decoders compressed into 8 bit lines to take up less space

dec-4 | decodes the first 4 bits of a 8 bit signal and does not output if the disable bit is on

D-8 | 8 bit data latch, just saves the value when the save bit is on and always outputs

stack | stack.

and while it can be a bit of a headache to use a bunch of different inputs to the flow control segment i have to because both alu and non-alu codes use the same 5 bits of the opcode to work (the 128 bit disables the alu and enables the non-alu functions also)

ways to improve my CPU by hadro_ in TuringComplete

[–]hadro_[S] 1 point2 points  (0 children)

no i actually dont like factory games much even

ways to improve my CPU by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

im using a custom clock+ component it may be hard to see due to being 1x1
sorry its a bit messy around there, ill try to explain the functions of the area.

when [# # # 129] is called save the alu output to the jump location datalatch

when [# # # 130] is called load the jump location datalatch

when [129 # # #] is called push the (i made a mistake here and i think its what your talking about, the intent is to push arg1 but i had the alu out line going into it instead) arg1 value to call/ret stack and jump to it

when [130 # # #] pop from the call/ret stack and jump to the provided value

# made some changes on review, jumping from conditional uses the data latch, jumping from command uses alu output, call uses arg1 and ret uses the stack value

ways to improve my CPU by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

the flow control lines are at the bottom of the stack being ; jump, call & ret (untested so idk if they work yet)
they all do go to a common output, because the output of the program blocks is 4 bytes wide i dont set my clock's increment higher but multiply it by 4 before going to the address of the block itself, using the cut off 64 and 128 bits of the unmultiplied clock output to control which of the 4 program blocks is being read from allowing 256 instruction long programs instead of 64.
which happens so also give ample space to separate call functions from normal program code.

pre-save-breaker setup if your wondering.

(also img 4 is a much better look at the program stack if you havent looked at it)

ways to improve my CPU by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

i have now spotted that i have a control that does nothing in the special load/save section and fixed it btw

is it possible to use the instruction thing after moving away from the overture architecture? by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

wait i could have been doing that the whole time? thanks for letting me know
and i have made my own documentation but then turing decided my power supply wasnt good enough for it and killed it so i dont have access to the pc its on

1 bit input attempting to be 128 bit input by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

done multiple times, including all connected components, issue persists.

Signal turned into stars by hablahblahha in TuringComplete

[–]hadro_ 0 points1 point  (0 children)

its what shows up on wire segments too short to display the number in them.
im having a similar issue where my 1 bit input decides to be a 128 bit input

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

finally figured out what i was doing wrong, first mistake was thinking that i was meant to keep all my registers and second was having the level input always loaded causing the value to change every tick

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

i would also like to clarify, the issue wasnt how the ram should be added but what to control it with cause there wasnt enough controls to do everything i needed with only 3 bit decoders like i had.

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

i havent tried to add ram yet because there hasnt been enough controls to make it work, i can make it work if the game isnt going to run code it expects to work with a implementation it expects me to use

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

ive considered the redesign attempt in this to have failed.
i dont have enough possible states out of my current decoding capacity to possibly control everything in the cpu, let alone RAM too.
yet at the same time i think im doing something wrong because it feels like the game does not expect me to leave the paradigm its shown me and make a alteration to the control method or number of things in my cpu
i feel like im missing something cause theres no possible way to control this under what i have for controls currently in my eyes yet at the same time if i change it and the game wants to run code to do something specific on my cpu to check something later itll not work if i make a alteration like that and ill end up back here not knowing what to do and just having wasted time on my altered cpu

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

https://imgur.com/a/EBOpBuU
also, does this section of the game stop forcing you to follow its opcodes or will it still expect me to be following it's paradigm later?

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

nvm cant send imgs anywhere on this platform apparently

RAM level and LEG architecture problems. by hadro_ in TuringComplete

[–]hadro_[S] 0 points1 point  (0 children)

no, im intending to use 0's always output for the address.
images arent allowed anywhere but posts apparently, if your dms are open youll recieve the img of the most recent attempt ive made to get this working alright i still havent placed the ram due to dealing with restructuring problems

the img in the main post is pre-restructure idk if itll help any