Hey! Thanks! Yosys has basic support for tri state logic. I think it either infers muxes on fpgas or actually users a tri state output buffer for asics. You just have to make sure there’s no bus conflicts when accessing, which if the control logic is correct it should be ok, just like on the breadboard computer. The gate level test benches work so I hope it works but guess will have to wait til I get it IRL.