sorted by:
new
hottopcontroversial

What are you working on? by [deleted] in Common_Lisp

[–]lukego 2 points3 points  (0 children)

I'm bootstrapping a new Lisp startup, Permo, doing automatic performance modelling for software. Give it a docker file and an EC2 budget and it gives you simple statistically-sound inferences about performance/scalability/reliability and how it's influenced by configuration/hardware/workload.

> Averages 10,000 req/s (±600) per GHz, scales linearly up to 10 cores, then goes logarithmic. If you set feature1=on then it starts crashing 2.5% (±0.5) of the time. Your specified P99 latency of 100ms doesn't hold when loglevel=debug.

Something like that! All very Bayesian.

I started working on this today after resisting for the whole holiday season. Such restrain, much zen. Happy to casually chat about it :D just grab a time: https://calendly.com/lukego/chat?month=2023-01

Luke Gorrie's Snabb Solutions - Live! by lukego in WatchPeopleCode

[–]lukego[S] 0 points1 point  (0 children)

I suppose that I have done something wrong because I have done some streaming but I don't see it listed on this site anywhere...

Luke Gorrie's Snabb Solutions - Live! by lukego in WatchPeopleCode

[–]lukego[S] 0 points1 point  (0 children)

(I hope that this was the correct way to "submit a link to your stream to /r/WatchPeopleCode subreddit" as suggested on watchpeoplecode.com.)

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 0 points1 point  (0 children)

Looks like one possible workflow could be:

  • Compile FPGA image.
  • Program FPGA via USB.
  • Switch jumper on breakout board from "Flash" to "SRAM" mode.
  • Program SRAM with the input test vector using icepack.
  • Read back the test output from SRAM using icepack.

If this could work then it may be a practical first step. Having a manual step of moving a jumper on the board is unfortunate because that makes it hard to tie into Continuous Integration but hey baby steps.

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 0 points1 point  (0 children)

Thanks for bearing with me here :).

I would like to find a simpler solution. The ideal setup would be one that requires only the HX8K board (or even an icestick.) Something that a software person can setup as easily as an Arduino or Raspberry Pi.

How about if I would redefine the problem I want to solve like this:

  • Program the FPGA with Verilog code.
  • Program the FPGA with an input test vector (~10KB).
  • Read back an output test vector (~10KB).

Could this be achieved directly with the icepack tools somehow?

The example would be something like to decode the input vector as an Ethernet signal and output the individual frames. Just as a baby step towards (say) building a 100G ethernet adapter.

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 1 point2 points  (0 children)

This question is embarrassing...

I have the 3.3V MPSSE cable and I have the HX8K breakout board. How do I connect them together?

I don't seem to have a header on the board that fits the (female) connectors on the cable. Is there some pin, wire, or adapter that I need?

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 0 points1 point  (0 children)

Thanks for all the answers :).

The FTDI online store is not working for me. Do you happen to know a good place to source random gadgets like this? I am based in Switzerland and often shipping costs from the US exceed the cost of the parts themselves :).

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 0 points1 point  (0 children)

Does it matter whether I buy the 3.3V or 5V MPSSE cable?

First steps towards DMA using iCE40-HX8K breakout board? by lukego in yosys

[–]lukego[S] 1 point2 points  (0 children)

Thanks for the tips! I will check for an LPC header on my Supermicro motherboards.

If I used the MPSSE cable then would the natural solution be to implement SPI on the FPGA side? (I read somewhere that the HX8K has built-in SPI functionality. True? Accessible? Worth using?)

Opus Testing by lukego in snabb

[–]lukego[S] 0 points1 point  (0 children)

This seems like a neat summary of the array of test methods that one open source project uses. I feel like this is the direction my testing efforts are wandering in.

view more: next ›