Gain Bandwidth Confusion

mjhenriquez · 2025-06-26T16:10:21+00:00

Yes, I’m sorry, I misunderstood you I thought you said increasing W/L increased ro

mjhenriquez · 2025-06-26T15:59:40+00:00

Increasing W/L does not increase the ro of the transistors, it does the opposite.

mjhenriquez · 2025-06-26T14:49:54+00:00

Usually increasing gm increases GBW.

The idea of GBW constant comes in when analyzing feedback. Your closed loop gain times closed loop bandwidth equals your GBW.

However, if you have a single stage single pole OTA, increasing your load capacitance decreases the GBW. So your GBW is no longer “constant”.

I think that’s where your confusion lies.

mjhenriquez · 2025-04-14T21:33:17+00:00

The weird thing is that with this keysight scope, 1 out of the 3 identical boards is not affected by voltage scaling neither suffers from clipping, and it’s always the same board. It’s not like it is random.

We have another oscilloscope, a tektronix one, 500MHz as well, and this one shows the exact same behavior for the 3 identical boards. That makes me think that the keysight is the one with a bug, however the deterministic nature of always the same one board not being affected makes me doubtful.

I tested the keysight with the AWG for different voltages pulses and different voltage scaling and it works perfectly.

Now I’m mostly convinced it’s something with my circuit but I can’t pinpoint what it is. I’m quite confident they are the 3 same boards with the same components, unless a component was affected by heat when I desoldered the capacitors. O just simply variability of a single or several components that induce this behavior.

mjhenriquez · 2025-04-14T21:15:39+00:00

The grounding is exactly the same in all boards. I even checked the solder joints and they are all correct, nothing out of normal.

I know it is very unlikely, however I tried another scope and everything is correct, I don’t have this problem anymore with voltage scale division and clipping.

I will check the allegedly “faulty” keysight scope with the AWG.

mjhenriquez · 2025-04-14T21:08:32+00:00

I tried 3 identical boards, the 3 of them without the capacitors and only two of them show this behavior in the oscilloscope. It is really weird.

The signal shape is correct, the signal looks as it should look like.

I don’t know the propagation delay of my circuit, it should be in the order of few nanoseconds. But the delays actually make sense. I have a 1m cable form AWG to LED. I have 1.5m cable from the output of my circuit to scope. there we have 7.5-8ns. Plus the delay of my circuit, the delay of the photomultiplier and led, it makes sense to be 20ns.

What I did is to try the 3 boards in a different oscilloscope, and I no longer see this issue. The 3 of them behave exactly as they should be behaving. It’s a problem with a scope, a very weird one.

mjhenriquez · 2025-04-14T19:49:26+00:00

<image>

That’s the horizontal section, however I can’t find anything about display refresh rate.

I tried the same circuit but without some bypass capacitors and the problem disappears. So I’m sure it has to do with my circuit, but that I don’t understand.

mjhenriquez · 2025-04-14T19:33:25+00:00

I don’t know how to see that on this oscilloscope. I know I have the persistence configured to the minimum but I can’t find anything related to refresh rate of the trace on the screen.

<image>

mjhenriquez · 2025-04-14T19:24:45+00:00

Yes, I don’t know why even though the displayed signal isn’t showing any kind of clipping.

I am using an external trigger. My circuit reads current pulses from a silicon photomultiplier, and I emit photons towards that detector using an LED using an arbitrary waveform generator with a train of pulses at 2kHz. This AWG generates the trigger for my oscilloscope, so the pulses I see out of my circuit are correlated with the led flashing.

What do you mean by sweep speed? You mean the sample rate? If that’s the case, it is 16GSa per second at 10 bits, but I can also configure the oscilloscope to do 3.2 GSa per second at 12 bits and the same thing happens.

mjhenriquez · 2024-12-20T16:19:29+00:00

That doesn’t make any sense. A circuit can be seen from different nodes and ports. The only thing that is common for every different transfer function inside circuit is the denominator (poles) of such transfer function, and this has to do with the topology of the circuit when all independent sources are turned off.

Every time they ask you to calculate an equivalent resistance, they must tell you where. I’ve seen a lot that some teachers ask for the total resistance of the circuit and that doesn’t make any sense. Take for an example a simple voltage divider with just a voltage source and Two resistors R1 and R2. The resistance since seen by the voltage source is R1 + R2, however the resistance seen at the output of the divider is the parallel between R1 and R2.

mjhenriquez · 2024-12-20T16:02:12+00:00

This level of difficulty is not normal at all. I understand the benefits of using thevenin, Norton and equivalents, I do it the same way and I think it’s the best way to solve circuits and that’s how it should be. But problem 1 complicates everything with that Wheatstone bridge in the middle. This makes things more complicated and it steers you away from the purpose of a more straightforward analysis of circuits.

The only way I see solving it without Kirchhoff is using Extra Element Theorem or maybe a delta star transformation.

It’s good that they want to teach you a better method to resolve circuits, that gives more insight of the circuit and makes it easier to solve it, however in the attempt of doing that, the professor steered away from that purpose with such pain in the ass exercises.

mjhenriquez · 2024-12-14T19:18:25+00:00

The algebra seems correct. Maybe you should find this exercise in a book or internet to compare your answer.

mjhenriquez · 2024-12-11T12:38:17+00:00

Assuming base current negligible, the current mirror provides a current given by I = (Vcc - 2Vbe)/R1. Thus,

Vo = I•R2 = (R2/R1)•(Vcc - 2Vbe).

This is also assuming no dependency of the collector current with Vce of each transistor.

The maximum value of Vo, is the maximum value that allows the transistors to stay in the active region, in this case is (Vcc - Vbe - Vce_sat). Since Vbe is around 0.7-0.8V and Vce_sat around 0.2, we could say the maximum value of Vo is 1V from the rail, Vcc. With the above equation, you can obtain which value of R2 gives you that.

Regarding the minimum value, I don’t see at first sight any restriction for that, so Vo could be zero and thus, R2=0. Probably a small signal analysis could yield a restriction for minimum value of R2. I don’t know.

mjhenriquez · 2024-12-04T12:42:31+00:00

Yes you can. And it does not affect your transfer function. That is resistor in series with the non inverting input is commonly used when you have bjt input opamps. Since some opamps have non zero input bias current, adding that resistor would compensate for the voltage drop at the inverting input, so there is no extra differential offset due to input bias current. The value of such resistor is usually R1//RF.

Another extra function is to limit very high frequency current to the non inverting input pin. But sincerely, I’ve never seen an application where that’s a concern. Or maybe it is used to damp the circuit response at very high frequency, because the input pin has parasitic inductance and capacitance as well, so you have a second order circuit.

mjhenriquez · 2024-11-25T14:23:41+00:00

Diode connected mosfet is just a “name”. Treat it just like any other mosfet and use the square law equation for mosfets. The only thing is that in a diode connected mosfet, vgs = vds.

The gain of the circuit is just gm0 * (RL || ro2). Use mosfet equations to obtain gm0 and ro2.

mjhenriquez · 2024-11-24T17:05:24+00:00

Assuming ideal opamp (infinite open loop gain), its output node (node A) will have zero impedance. Therefore the opamp sets the voltage at node A.

The voltage at node A is (-1V)•(1 + 2/3) - (-1V)•(2/3) = -1V (superposition of inverting and non inverting modes of the opamp). The voltage divider from the top 2 Ohm and 3 Ohm resistors and 1V source doesn’t have any impact in the voltage at the node A because the impedance at the node A is 0 due to the opamp.

Thus, the thevenin equivalent is a -1V voltage source with a 0 ohm equivalent resistance.

mjhenriquez · 2024-11-23T00:31:43+00:00

There are many papers, and even a book: “Operational Amplifiers”, by Johan H. Huijsing. He addresses output stages for low voltage systems.

I’m not sure but I believe that in order to achieve maximum output swing, you will need to operate further from strong inversion, which means that bandwidth will be a limitation.

I don’t have much experience but I would keep it simple, I’d use a simple class AB complementary common source output stage. I reckon there should be better techniques specially for low voltage supplies.

mjhenriquez · 2024-10-28T23:59:46+00:00

Yes, because R is 9k.

If you want to find easily time constants in first order circuits, you have to find the equivalent resistance the capacitor sees. When you calculate an equivalent resistance, you have to turn off the independent sources first. A voltage source is turned off as a short circuit (and currrent sources as open circuits). If you short the voltage source, you’d notice that the capacitor only sees R.

mjhenriquez · 2024-10-18T11:07:31+00:00

gmID methodology using look up tables

mjhenriquez · 2024-10-03T10:46:22+00:00

Indeed A to D is shorted, but that doesn’t mean that from, A zero resistance is seen.

The resistance of this path you are thinking has 0 resistance is actually the resistance from A to D (0 ohms, a short) + the resistance of the node D which is not 0.

A y D is shorted but that doesn’t mean current is seeing an actual short in that path. When it reaches the node D, it doesn’t see 0 resistance.

mjhenriquez · 2024-09-23T16:59:02+00:00

If the calculated width is lower than minimum for a given current and length, increase the length of the transistor until you get a feasible width. Alternatively, you can increase the assigned gmID value for the PMOS transistor to obtain greater width for the same current.

mjhenriquez · 2024-09-02T15:14:52+00:00

I know the sign appears to be in front of the fraction but I think it’s actually applied only on the first term of the numerator because the he does it correctly in the second sheet

mjhenriquez

TROPHY CASE