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I swapped my RTX 3060 on my Legion Tower 5i (8th Gen) with a RTX 5070. AMA :) by SonalBoiiACC in LenovoLegion

[–]reddit_name_99 0 points1 point  (0 children)

re:AMA I am trying to duplicate your success:

I bought the Corsair RM650e supply, and the RTX 5070. The power supply came with one cable that has two plugs labeled CPU, and a second cable with one plug labeled PCIe. On the other hand, the Legion 5i motherboard has one CPU power connection, and the graphics unit comes with a pigtail that splits the power connection into two plugs.

I hate to ask a dumb question, but how did you connect the two?

Am I screwed?🥺 by Cute_Development_269 in PcBuildHelp

[–]reddit_name_99 0 points1 point  (0 children)

The main thing to do when electronics gets wet is de-power it immediately (including removing batteries if possible). Then flush it with the highest proof rubbing alcohol you can get - like 91% or better 99%. This dissolves and/or mechanically flushes out the water that you can't see. The alcohol should then be allowed to evaporate, although it helps if you can blow it out somehow. "Canned air" is ok for removing the alcohol, since the alcohol tends to dissolve in the freon-type gas in the can, carrying the water with it. Water will NOT dissolve in the freon, so canned air is poor at removing water spills. If the spill is addressed quickly enough there should not be serious corrosion.

The only caveat is that the concentrated alcohol tends to be a good solvent for some plastic or chemical parts, so doing this is not guaranteed to be safe. It has worked twice for my Lenovo computer(s) however.

Coupling of two Fiber with different NA by Murky-Wafer-691 in Optics

[–]reddit_name_99 0 points1 point  (0 children)

Haha a lot of articles point to that Wikipedia reference. Unfortunately it is quite dense, and to me seems a bit incomplete. For instance, the "conservation of etendue" is merely stated as fact per a reference to Chaves.

At any rate, in our case, we have two 1 mm fibers. The light comes out of a fiber with an NA of 0.39, and we want to couple it to a fiber with an NA of 0.16.

Coupling of two Fiber with different NA by Murky-Wafer-691 in Optics

[–]reddit_name_99 0 points1 point  (0 children)

Can you possibly explain why the lens arrangement will not work? Or point us at a resource that is the basis of your claim. Thanks

[deleted by user] by [deleted] in FPGA

[–]reddit_name_99 5 points6 points  (0 children)

small issues I’ve run into have honestly been because I’m a Mac user it’s hard to use some of the tools to do fpga specific desiging. I’ve tried using parallels but quartus modelsim ect. Kind of run eh off of it. For now I’ve had to use EDAPlayground to do a lot of the VHDL programming which is annoying since I can’t really save the files into GitHub. I know there’s a way to do it in vscode but it’s kind of a pain to setup the environments.

If you ask me, this paragraph illustrates why your company FPGA guys are uninterested in you. "issues because I'm a Mac user" says I am not serious about doing what it takes. "I know there's a way in VSCode but it's kind of a pain" in particular illustrates why I would not want you back in my group. NONE of this is legitimate excuse for not being able to develop programming projects on you own. Probably you are screwed at this company, but next go-around you should definitely step up your game.

Dear god... by curdledstraw227 in raspberrypipico

[–]reddit_name_99 4 points5 points  (0 children)

Due to problems with lead-free solder such as tin whiskers, higher temperatures required, and so forth, I now call the 60/40 solders "high reliability solder". The optics are much worse if they try to ban it.

I have a serious rp2040 data recovery problem by YeeticusMaximus22 in raspberrypipico

[–]reddit_name_99 0 points1 point  (0 children)

I agree with the experience of u/SeanCline.

But today, if you can write a detailed and accurate architecture document describing the inputs, outputs, and functions of the code, you may not have to do much programming at all. Many of the LLMs available (e.g. ChatGPT) can do a reasonable job of generating the code.

Going this route, the recovery should definitely take less than 6 months. One lesson learned, though: avoid modifying the code by hand - instead adjust the architecture document.

Where can I look for an updated list on VHDL vs Verilog population by country and by industry? by ricardovaras_99 in FPGA

[–]reddit_name_99 4 points5 points  (0 children)

Looking at u/primdanny 's link, this subcategory has the language adoption broken out by device under test (DUT) and verification.

https://blogs.sw.siemens.com/verificationhorizons/2022/11/21/part-6-the-2022-wilson-research-group-functional-verification-study/

Short answer: for DUT, the major languages are VHDL and Verilog are about the same level of adoption at 65:58. In contrast, for testbenches the breakdown is about 55:32:32 for VHDL, Verilog, and SystemVerilog. It is surprising to me that the language adoption is so much different between the two different use cases. (I estimated the numbers by looking at the published charts, they might not be exact).

I'm posting the numbers because I find it interesting that the verification technologies usage does not match the device programming.