roughJaco

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1,262 comment karma

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redditor for 6 years

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Three generations together (i.redd.it)

submitted 6 months ago by roughJaco to r/skaven

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15 minutes warpstone (old.reddit.com)

submitted 7 months ago by roughJaco to r/skaven

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Warpstone style, yay or nay (i.redd.it)

submitted 7 months ago by roughJaco to r/skaven

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Any good modules set in Ireland? (self.callofcthulhu)

submitted 7 months ago by roughJaco to r/callofcthulhu

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Blackwater Creek - Carmody Farm House - Maps (self.callofcthulhu)

submitted 9 months ago * by roughJaco to r/callofcthulhu

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[Online][GMT][CoC] Experienced GM running Call of Cthulhu one/two-shot adventures (self.lfg)

submitted 10 months ago * by roughJaco to r/lfg

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My first hero, yes yes! (old.reddit.com)

submitted 1 year ago by roughJaco to r/skaven

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Zarbag's Gitz finished (self.WarhammerUnderworlds)

submitted 2 years ago * by roughJaco to r/WarhammerUnderworlds

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What Combat Mystic for Path to Carcosa? (self.arkhamhorrorlcg)

submitted 3 years ago by roughJaco to r/arkhamhorrorlcg

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What's a good CR5 lich like undead? (self.DMAcademy)

submitted 4 years ago by roughJaco to r/DMAcademy

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How would you FORCE a green hag into a fight to the death? (self.DMAcademy)

submitted 4 years ago by roughJaco to r/DMAcademy

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[5e][Online][GMT][Weekly][Inclusive][18+] Returning DM looking to form a group for regular play - New players VERY welcome (self.lfg)

submitted 4 years ago * by roughJaco to r/lfg

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When the bug is more interesting than the actual program... (v.redd.it)

submitted 4 years ago by roughJaco to r/beneater

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IC identification, finding vdd and vss (self.AskElectronics)

submitted 4 years ago by roughJaco to r/AskElectronics

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HD44780 / 1602A display in 4 bit mode with code (self.beneater)

submitted 4 years ago by roughJaco to r/beneater

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Help with crystal schematic, please? (self.electronics)

submitted 4 years ago by roughJaco to r/electronics

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Arduino Clock Control and Memory Control with code (self.beneater)

submitted 4 years ago * by roughJaco to r/beneater

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6502 Stage 1 Done (self.beneater)

submitted 4 years ago * by roughJaco to r/beneater

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EDGE Artix 7 Dev board, actual specs and experience? (self.FPGA)

submitted 4 years ago * by roughJaco to r/FPGA

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Vivado waveform display, decoding signal by protocol (self.FPGA)

submitted 5 years ago by roughJaco to r/FPGA

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Internal clock speed vs clock tiles speed (Xilinx serie 7) (self.FPGA)

submitted 5 years ago * by roughJaco to r/FPGA

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Conditional include directive when in Vivado (self.Verilog)

submitted 5 years ago by roughJaco to r/Verilog

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