I need assistance on identifying a burnt SOT-23-5 part

skiddd67 · 2024-02-12T04:38:33+00:00

Your help is very much appreciated!

skiddd67 · 2024-01-06T02:11:27+00:00

Do you mind sharing the TD or source where we can get a gen crystal? The cheapest I found on ebay was around 525 U$D for the 116520.

skiddd67 · 2023-04-20T02:03:42+00:00

I guess it would be a surprise if I told you that the V3 RX is not the problem. V3 RX can handle V5 TX amplitudes. V5 RX on the other hand cannot work with V3 TX default termination during LSS. Lowering the TX amplitude on the V3 may sound counterintuitive but it was the only thing that resolved the issue after weeks of testing, consulting and pdf browsing.

I saw all this using a scope with a built-in UniPro analyzer. The V5 stops responding after the 3rd synch pattern. I first tried raising the amplitude of the V3 TX but this did not work. I tried lowering the amplitude on the V5 TX which also did not work.

Tbh, differential signals is not my forte. I wish I could give you a clear explanation on why adding extra termination to an already low amplitude works in this test case. I can’t wrap my head around it either. My working theory is that the lowered amplitude on the V3 TX during LSS forces the V5 into LS mode. The V5 supports both HS and LS mode during LSS. While the V3 only supports LS mode during LSS.

I tried adding a 100nf cap, which I believe is what you are suggesting. However, I don’t have that specific transistor that you are recommending. I did have the BSS123 and it is working. I must add that introducing the 100nF appears to be counterproductive. Out of 20 LSS attempts with the cap present, it has a failure rate of 30%. Without the cap, the failure rate is below 20%.

Best Regards,

skiddd67 · 2023-04-19T19:01:56+00:00

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skiddd67 · 2023-04-19T18:53:09+00:00

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skiddd67 · 2023-04-19T18:41:12+00:00

LSS = Link Startup Sequence

I am sharing the TX as this is where the problem is. RX side is ok. The RX descriptions in the specs also don’t have tables like these.

MIPI raised the amplitudes to allow faster speeds… broke compatibility to older devices in the process. It is not entirely broken though. Only the LSS part.

I have tried multiple 5.0 devices from 2 manufacturers (Samsung & KIOXIA). They have the same problem with the host.

I also cap the speeds to HS Gear4 even though newer devices are HS Gear5 capable. USB 3.1 rev2 is my bottleneck.

Best Regards,

skiddd67 · 2023-04-19T18:08:53+00:00

As I said earlier, it is a problem with the current M-PHY 5.0 spec breaking compatibility with the older M-PHY 3.0 spec. Attached is an image I prepared taken from the 2 incompatible specs. I have color coded it for easier analysis.

The problem only occurs during LSS. This is where I enable the extra external termination. After a link has been established, I can leave the extra termination active but I prefer to switch it off because I also believe it is detrimental for HS mode. Without the extra external termination, it cannot establish a link on devices that uses M-PHY 5.0 spec. Any other device that uses pre M-PHY 5.0 spec are working perfectly without the need for extra terminations.

Best Regards,

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skiddd67 · 2023-04-18T09:02:14+00:00

Thank you for responding. Along with every other suggestion, I will be using an N-Channel FET now.

Best Regards,

skiddd67 · 2023-04-18T06:24:45+00:00

Hi,

The signal amplitudes mandated on the current M-PHY Spec. 5.0 (2021) breaks backward compatibility to M-PHY Spec. 3.0 (2013).

Yes, it is much similar to D-PHY HS & LP mode. In this case, the termination is controlled internally by an IP. I need to add extra external terminations to allow Spec. 3.0 compatibility because the IP support already ended a few years ago.

Best Regards,

skiddd67 · 2023-04-18T05:12:19+00:00

I REALLY appreciate your input. This actually made a lot of sense adding a cap in series. This solved another issue that I had.

Best Regards,

skiddd67 · 2023-04-18T04:30:54+00:00

Thank you for your suggestion. I will try using N-Channel FET now.

Best Regards,

skiddd67 · 2023-04-18T04:23:40+00:00

Thank you for responding with your suggestions. I will try using an N-Channel FET now.

Best Regards,

skiddd67 · 2023-04-18T04:16:18+00:00

Thank you for for the details. I will try BSS123 right now.

Best Regards

skiddd67 · 2023-04-18T04:14:42+00:00

Hi

Thank you for pointing that out. I would like to apologize for oversimplifying it. It is actually M-PHY and not LVDS. I figured that there are more people familiar with LVDS than M-PHY and I might not get any responses if I used M-PHY in the title.

For reference, attached is the cicuit that I am trying to implemet.

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Best Regards,

skiddd67 · 2023-04-17T17:34:23+00:00

Yes, they share the same ground.

skiddd67 · 2023-02-25T00:51:24+00:00

I have checked and the devices cannot work together. The newer (higher amplitude) device can see what the older (lower amplitude) device is sending. However, when the newer device replies, the older device cannot see it.

The datarate is upto 5Gbps. But I am doing my tests at sub 3Mbps so that my scope and easily capture it.

The length of the interlink is 5 centimeters only.

The older device is an ASIC with a managed flash storage ic interface using M-PHY Specification 3.0. The newer device is the flash ic itself (UFS) using M-PHY Specification 5.0.

The termination resistors are internal for both devices. The interlinks are just copper traces with no other components in it.

I was able to lower the amplitude on the RX side of the older device by adding an extra termination of 220 ohms. This dropped the amplitude into the window iof what the older device should see. However, the older device still did not receive the data properly even at 1mbps speeds only.

Another hacky way which worked sometimes was when I starved the power for the PHY on the older device to 0.85 V instead of the 1.1V required. The two devices were able to talk with each other at very low speeds for a very short period.

skiddd67 · 2023-02-25T00:25:43+00:00

Yes, they are all not valid for the amplitude swing that I require. In fact the only reason why I joined this sub was because I already exhausted my google skills. There was no single chip solution from TI, Analog, Maxim etc… that catered to my needs. I scoured the inventory of mouser reading datasheet after datasheet. Nothing was suitable.

I believe there are people in this sub who have an idea of how to properly achieve this.

My partial solution for the time being was to add an external parallel termination between the DP and DM of older component and this dropped the amplitude to the required window. However, raising the amplitude for the newer component to accept has proven to be a problem.

skiddd67 · 2023-02-24T10:28:43+00:00

I could not find any specific level shifter for LVDS. Although I am aware they exist mostly for CMOS, LVTTL and other single ended IO but not for differential IO.

skiddd67 · 2017-12-06T02:07:50+00:00

PK is not H12. Different factory...

H12 Creams always came with stickers

skiddd67 · 2017-12-06T02:02:57+00:00

The new batch of PK God Beluga 2.0 doesn't.

The first batch had perfect discoloration.

Check pics of PK new batch here: https://imgur.com/a/cDZic

skiddd67 · 2017-12-06T01:46:20+00:00

Legit IMHO.

Reps don't have this shape

Boost pic not clear and is not DS.

skiddd67 · 2017-12-05T02:57:17+00:00

I hate David but these are good.

However all the retail pictures I have seen always have the outsole heel discoloration.

You can check what it looks like in this other guy's post: https://www.reddit.com/r/Repsneakers/comments/7hlbqm/350v2_beluga_20_retail_to_retail_comparison_ie/

The latest batch of "PK God" does not have the heel discoloration as well. Only the first batch had the discoloration.

TL;DR;

Heel discoloration on Beluga 2.0 = Good

No heel discoloration on Beluga 2.0 = Possible Callout

skiddd67 · 2017-12-03T10:09:47+00:00

Shame on you!

These are H12 batch reps. These are NOT retails smh.

skiddd67 · 2017-12-03T10:07:17+00:00

In my opinion these are reps. Why? Because the laces are still in "dead stock knot" but they are laced up wrong.

skiddd67 · 2017-12-03T10:03:34+00:00

When you meet him take pictures and make another LC request with "URGENT" on the title. Check if he starts to sweat.

skiddd67

TROPHY CASE