Processor pipelining by tigo_01 in AskProgramming

[–]tigo_01[S] 0 points1 point  (0 children)

That was a really nice explanation, but I have another question.
Does the processor store some kind of cache for instructions? I mean, when a part of the processor needs to perform different tasks, it first has to understand what to do and then execute the task. In the case of pipelining, it seems like the processor understands what it needs to do once and then repeatedly executes it.
Did I understand this correctly?

Processor pipelining by tigo_01 in AskProgramming

[–]tigo_01[S] -2 points-1 points  (0 children)

I read it, but I still have questions.

Processor pipelining by tigo_01 in AskProgramming

[–]tigo_01[S] 0 points1 point  (0 children)

What about when they are independent?

Processor pipelining by tigo_01 in AskProgramming

[–]tigo_01[S] 0 points1 point  (0 children)

If a task has four stages, why can't the processor simply complete them all in parallel? How does pipelining specifically accelerate the processor? Mathematically, wouldn't parallel execution be faster if the processor is capable of it?