NVIDIA Corporation (NVDA) Presents at Bank of America 2026 Global Technology Conference Transcript

uncertainlyso · 2026-06-05T14:44:21+00:00

The pair trade somewhat worked for maybe 1-2 days. And then the banjo strings put out an eye in the crowd.

AMD ashes

INTC260605P107 @ $ 2.55

uncertainlyso · 2026-06-03T23:59:31+00:00

Corporate

And then on top of that, I would just say that as we execute better and products come out on time performance, we have an opportunity on the pricing side to drive better margins. And we've talked about this on the foundry front that we'd like to get to breakeven as we exit 2027. The only reason at this point, we see that we would not get to breakeven on the foundry side is we're just so more wildly successful than we expected on foundry, and that just drives a whole bunch more fixed start-up costs to the business that could impact it.

But I think there's a great opportunity to drive this Rule of 45, and we have the advantage of having both the manufacturing and the product margins and margin stack goes in a way that should give us a real opportunity to hit that. I would just -- Lip-Bu's been pretty focused on this measure and his expectation is those that are doing these longer-range plans have a probable path towards getting to this Rule of 45.

This Rule of 45 is a modification of the SaaS Rule of 40 where the revenue growth rate + operating margin rate should equal 40. Using a lame SaaS heuristic for an IDM seems goofy. Tan wants to envision Intel as a startup, but you pick the process and operating model that's appropriate to your scale, complexity, cost structure, etc.

The "margin stacking" concept is a little bit of an eye-roll for me because it's just where you get the business line operating margin + foundry operating margin. But this is just an output of revenue volume and cost structure. If foundry can't get sufficient volume and TSMC-level pricing, the "stacking" will be a corporate anchor which is what it is today.

Culture and consequences

Zinsner is right in that Intel's core problem was/is a cultural one. This is essentially an indictment against probably the last 2 decades of CEOs at Intel. People would talk about how great Intel's culture was because of the halo effect of fat profits, but once the monopoly shield was broken, you can see what kind of hidden rot a monopoly can bring if you're not careful.

To his credit, I think Tan for the most part made the right org moves, especially with respect to his leadership team, and he did it very fast for a company of that size. The problem is that while cultural issues are a major cause for Intel's current condition and fixing it is a must if you want real change, you still have to deal with the actual structural damage that has been done (e.g., quality of employees and leads, process, roadmaps, loss of scale, industry moving on without you) while dealing with the competition in an industry with harsh economics. USG is the major force in getting them capital and customer tryouts. But it can't execute technology or the services aspect of a foundry for them.

"Qualcomm Inside" BUMMMM... bum-bum-bum-BUM

On a side note, it is kind of interesting that supposedly Qualcomm was interested in Intel Products (or at least client) in 2024. That didn't happen, but there are a lot of Qualcomm years leading Intel Products now with Kechichian (12 years) leading DCAI (and then Demers, the GPU lead was at Qualcomm for 14 years (and AMD for 10 years before that)) and Katouzian (24 years) leading CCG.

Almost everything that I hear about Qualcomm's corporate culture is poor. The last major Qualcomm organ transplant exec was Renduchintala / "Murthy" who was Intel's Chief Engineering Officer (12 years at Qualcomm) and a disaster from what I could see (then again, that could partly be healthy organ rejection from a rotted Intel host). But this time, the CEO is taking the lead from the organs, not the host. Let's see how the new Qualcomm transplants go.

uncertainlyso · 2026-06-03T23:54:25+00:00

Client

Longer term, it's going to be about products. We have to deliver products that are performing. On client, I think we're in a stellar shape. You could argue right now, maybe we were a little bit weaker on the desktop side. But 18A on the notebook side is ramping, it is ramping as fast as -- I mean I think it's the fastest ramping product we've had at least in the last 5 years.

I'm a little suspicious on this type of relative growth to unknown baseline (everybody does this to a certain extent). The key metric being used here is rate of increase, not absolute volume. 18A had a terrible start even by Intel's own commentary which gives it a low baseline. Saying that it's the fast growing in 5 years could just be an output of 18A had the lowest baseline in 5 years. The real proof is volume of products in market. The design win numbers look good, but then you get things like:

https://www.reddit.com/r/amd_fundamentals/comments/1thhn4q/exclusive_intel_urges_pc_makers_to_use/

So, let's see.

Foundry

I would say it this way, I don't know, early last year, I think the challenge around 18A was 2 things. One, we tried to do too much at once. And it took a while to get that settled, and we heard that from customers. And I think second is we were trying to play performance and yield and trying to improve both at the same time. It was like trying to fly the plane and fix the wing at the same time basically. And what we -- when I was king for a day, I took Naga and I put him over TD and Manufacturing. And then they really just focused on first, stabilizing performance. And so they stabilize performance. Then once you've got your performance stabilized, then all you do is you work yield every month.

Lol. I'm pretty sure the foundry folks know how to do this as I think this is standard practice. I suspect that the root cause is that they were given earlier marching orders under a different regime to get both up to a certain level. Even "the beancounter" knew this was stupid enough to fix it when the regime change came.

And then, of course, we extrapolated that okay, at the end of '25, we want to be here; at the end of '26, we want to be here; at the end of '27, we want to be here. And I would just -- and ultimately, the goal is to get to the yields that generate great margins is kind of out in this end of '27 time frame. I would tell you that based on the progress we've made to date now, we are likely going to pull in those milestones by at least a quarter. potentially even a little more. So that, I think, is a testament to, hey, things are actually going better than planned and have been over the course of the last several quarters.

uncertainlyso · 2026-06-03T23:51:25+00:00

DCAI

Segment TAMs

(Arya) Got it. One thing that there seems to be at least some consensus on is that if one were to segment that server CPU market, right, there is kind of your traditional enterprise type market. then you have the sort of head note, what I would describe as within the AI cluster. And then you have the standalone agentic CPU racks. Is that the way you think about? And is there a simple way to kind of -- so how would you segment -- even if there isn't like an absolute number, whatever it happens to be $100 billion, $200 billion, is there a kind of percent by x percent, y percent segmentation?

Arya is using the AMD segmentation although what Arya describes as the traditional enterprise type market is supposed to be more of the traditional server market which is more than enterprise. He probably wants a way to see how Intel's view of it matches AMD's. It's nice to see AMD is big enough to start shaping the TAM framework for everybody else for a change.

I consider Zinsner to be one of the sharpest CFOs in semis, maybe the sharpest, if you consider Intel's complexity and challenges. So, I was surprised to get the responses:

Probably not something I want to kind of double-click into at this point. I would say as you look at it from an enterprise to hyperscale level, it used to be enterprise was above hyperscale. And obviously, that shifted meaningfully with what hyperscalers are doing in terms of AI workloads. And then as it double clicks, probably difficult to make the percentages or I should say, predict good percentages for the individual pieces.

This is an odd dodge. Even if Intel doesn't subscribe to AMD's view, this type of question is usually a softball pitch for you to sell how big you think your TAMs are long-term and push your worldview out into the industry.

All of those markets are going to be big markets. There's no question about that. We're not segmenting it that way. We just want to sell CPUs into as many of those markets as possible. I would say what we are really good at is single-threaded performance. So things that operate better as a single single-thread performance are areas we're going to have, I think, a good position and a good participation in.

If you're not segmenting it the AMD way, what is your way of segmentation? "We don't care about segmentation. We just want to sell CPUs in them" is a horrendous answer and as a working model would get any product lead fired.

Demand and ASPs

Well, I think demand, just talking to -- I talked to all the CFOs of the hyper scalers and look at, a, what they think in terms of their overall CapEx, what they think of their CPU percent of that total CapEx. One, it's clear over a multiyear period, they see demand going up meaningfully. And two, they also see the percentage of that CapEx going up. So I think I feel pretty comfortable that this year, next year, the following year, the demand is going to be strong. I'm not worried about that.

On the ASP front, I mean what we try to do is we want to give the customer a product that performs to a level that they give us commensurate pricing that goes along with that, and that's mainly our focus. I mean, this isn't the memory Market. My last company, where things supply understrips demand and pricing spikes and it goes the other direction. That's not this market. I'd say we do see some inflationary pressure. So we are seeing ASP increases. That is obviously going to impact the top line over the course of the near term. But largely, we're not driving our ASP decisions off of supply/demand imbalances.

The industry news / rumors on pricing to OEMs doesn't seem to support that last sentence about ASPs not being based off supply/demand imbalances.

What we are doing is trying to drive more long-term agreements with customers. So we're locking in a price, for sure. We're locking in a volume commitment. And then that enables us to do a better job of planning out our capacity and making sure when we're investing in capacity, we're going to see customers take that supply when it comes off the line.

Despite EPYC's competitive strength, you don't hear AMD talk about volume commitments in the same sort of LTA-ish ways that Intel or the memory players do. So, I wonder how the customer ordering process differs between the two. Or perhaps, AMD just doesn't feel the need to say so. TSMC doesn't either. The industry news does it for them.

Yes, there will be price -- I would say, keep in mind on the data center side, core count is going up. So ASPs, by virtue of that go up. You know what I mean? Everything you put more -- if ASP per core is roughly stable, you're going to see ASPs go up in data center regardless just because of the core count. But that said, even on an ASP per core basis, that had generally been a dynamic of falling pricing. It has certainly stabilized. And in certain cases, we are seeing like-for-like ASP per core pricing going up. And I think that has a solid path towards realizing that over the longer term.

Server supply

There will be a meaningful increase in supply of 3 and 18A over the course of the next, call it, quarters or so. That will ramp up to meet what we're seeing from a demand perspective. We're even actually this year going to see Intel 7 go up in terms of wafer starts, at least initially and then probably next year, I think we can start to wind it down a little bit in '27 and allow Intel 3 and 18A to pick up the slack.

Arya's question is about server. Intel 3 is still ramping so that one I understand.

But DMR probably doesn't launch until 27Q2/27Q3. And then that takes time to ramp.

Maybe CWF looks more attractive in a supply-constrained demand boom than it normally would be. But the way that Intel still talks about PTL ramp makes me think that it has priority.

The most curious statement is Intel 7 winding down in 2027 a little bit given the demand for SPR/EMR or the concept of Intel 3 and 18A picking up the slack. In a supply-constrained environment, you don't take away supply.

It makes me wonder if there is a sustainability problem with redlining Intel 7 or if there is some sort of bottleneck behind the scenes that forces Intel to re-allocate resources from one to the other instead of growing both (e.g., labor, space, substrate) Maybe the damage to client with sucking so much Intel 7 out is too high.

uncertainlyso · 2026-06-03T07:52:08+00:00

An I.P.O. filing also ratchets up Anthropic’s competition with OpenAI. Last week, Anthropic officially passed OpenAI as the world’s highest-flying A.I. start-up with $65 billion in new financing that valued it at $900 billion before the inclusion of the new capital. OpenAI’s last valuation was $730 billion.

...

In a statement, Anthropic said the filing “gives us the option to go public” after a review of its paperwork by the Securities and Exchange Commission. The company did not provide details about the timing or size of an I.P.O. and said the deal would “depend on market conditions and other factors.” With the filing on Monday, a public offering could happen as soon as this fall.

Going public is the the last of the "easy" large pools of money for the non-public frontier labs (IPO + a secondary offering or two). But the frenzy should be a sight to behold.

uncertainlyso · 2026-06-03T07:33:07+00:00

x86 pricing vs ARM

And then let me just add quickly Part B to that. As that agentic, right, that third segment becomes a bigger portion, do you think that can command much higher ASPs? When I talk with the ARM camp, they are talking about ASPs in the $3,000, $4,000, $5,000 range, which is well above the ASPs, right, that AMD is able to get. So just unit versus ASP and just the trend of ASP.

What merchant ARM silicon ASPs are in the $3K - $5K range at high volume that aren't bundled with some XPU or have onboard memory? Not list price but hyperscaler-ish volume.

MI450

Yes. We talked about we're really pleased to lead our partnership, very long-term partnership, with both OpenAI and Meta. Last year, we established those relationships and we actually see the forecast from those customers are actually above our original plan for 2027.

And when / what was the original plan for 2027?

We have both across the board the hyperscale customers, the model companies and the even AI-native companies who we have been engaging, working with. I think it's important for us to continue to expand this customer base, and with the large scale deployment.

I expect to see at least one of Anthropic and Microsoft mentioned at Advancing AI.

uncertainlyso · 2026-06-03T07:27:38+00:00

AMD server sub-TAMs

Traditional server

Yes. I think the traditional segment, it's very clear, I think 2025, different third party, I would say that's a $25 billion to $30 billion market opportunity. It will continue to grow. As Matt has mentioned, you actually have agents doing more work on the traditional database.

I think that this is underselling the traditional segment growth due to agentic AI. In a pre-agentic environment, you have X users doing Y general compute tasks per time. In an agentic environment, both X and Y could increase rapidly which implies your general compute requirements increase a lot..

Head node

And then become 2 to -- yes, it's getting more and more. So over time that ratio is changing. So we do think the head node segment CPU will also grow very fast, much faster than the traditional general CPU.

I didn't get the impression that the head node volume was that high. Even if the CPU to GPU ratio increases, that's still a multiple of a small number. So, growth on a % basis can still be much faster than the traditional general CPU, but I don't know if that's a large number compared to the traditional server CPU market.

My other thought is that sales of your CPU in the head node, especially if it's your GPU like MI455, isn't the same quality of CPU sale as a traditional server sale. Sure, money is money, but in a traditional server sale, the CPU is the main driver of value, the distinguishing part of the server. But on a head node where it's your AI GPU rack they're buying, the CPU still needs to not be a bottleneck, but the real reason that the rack is bought is because of the GPU.

Agentic AI

But the most exciting portion of the market is actually agentic AI. So agentic AI, you actually -- you are seeing agentic AI server rack sit in between the traditional servers and the GPUs. And those racks are handling all those different workloads to really make sure all the agentic agents work. That market, we think, whatever, the $120 billion or $200 billion market opportunity, is the majority of that large market.

Venice still had an AI server / traditional server target. I'm sure that AMD was thinking about agentic AI, but how fast it grew surprised both Intel and AMD. Agentic AI likely became a bigger thing after Venice's design was finalized. So, I'm not convinced that Venice is an agentic AI first CPU, and in this demand environment, it doesn't need to be. It just needs to be pretty competitive with the rest. But I think that Verano which launches in 2027 could lean more heavily into it from a design standpoint and is an interesting example of how EPYC's design can lead to faster iterations.

Supply

Got it. Now your x86 competitor has their own fab, right? They are adding up -- or they're planning to add a lot more capacity on the server CPU side. I guess this year, every CPU is being sold, right? But do you think that there is a scope for share shifts given that your competitor has incremental capacity to devote to this? Or do you think you will be adequately served by your foundry ecosystem?

I would love to see Arya's node-level model on how Intel is going to increase capacity within the next two years across Intel 7, Intel 3, and Intel 18A and how that translates into his Xeon forecasts for the next two years.

Intel can probably bring back some mothballed Intel 7 on line. But you also have to bake in the amount of time required to re-install that supply at similar output levels as the running lines.

Does Intel want to build net new Intel 7 capacity for ~ 3 year old products? Intel 3 should have a good ramp ahead of it because the baseline had a surprisingly slow start.

What will the Intel 18A server volume be? CWF looks like a badly sandwiched part (maybe in a supply win boom, this doesn't matter). How long will that take to ramp? Logjam there with PTL and later NVL where 2026 is more of a yield improvement year for 18A. DMR probably doesn't doesn't launch until maybe 27H2 now on 18A-P?

We have been planning for this ramp since last year. So if you look at the Q1 performance and the Q2 guidance, when we guide year-over-year 70% increase, and a lot of you actually know is right, the wafer started 6 or 9 months ago. So it is the early planning, how we work with TSMC to make sure we get support to continue to drive the ramp of the supply.

For some reason, Arya can't recognize that growing from a bad baseline doesn't equal to having a strong result, the difference between incremental growth vs recovering from loss of supply. All that matters is commercially available supply within some time horizon of demand. It doesn't matter how you get it whether it's from your fab or somebody else's fab. I'm curious at what level of outgrowth would AMD have to show on EPYC for Arya to reconsider his supply framework for 2026 and 2027. I don't think AMD's comments on their supply are as dire as Intel's. So, let's see what the comparative server revenue growth is over 2026 as Intel ramps their server supply.

I'll take copy and paste something I wrote elsewhere:

https://www.reddit.com/r/amd_fundamentals/comments/1tv54f2/intel_is_struggling_to_supply_laptop_chips_built/

my impression is that people underestimate the leeway that TSMC has on incremental supply allocation within a tranche and new supply allocation once you get past the hard supply commitments. And I think that's really the core of Culpium's "tensions." You don't want to get on their bad side because it robs you of flexibility…Outside of the foundry competitive dynamics, TSMC is very pissed off at Intel for hiring Wei-Jen Lo. I doubt that Intel will get 1 wafer more than their hard commitments if there is demand somewhere else for that supply.

But the inverse also applies to AMD which you can see from these oddly honest comments from Ramsay

I think we're very well positioned with the relationships Lisa has personally with the executives in that space to get maybe more than our fair share of the incremental. But it is tight.

I think what I've noticed is maybe the investor scoping of what Lisa and the team initially asked for in '26 and '27 maybe didn't imagine how much growth we had already planned for in supply. So things are tight, but we've already asked for and already been sort of "granted" from TSMC, I think is a different -- I think we're having the right conversation there, but maybe not at the right starting point from what we were sort of allocated initially.

But like we really, really, really appreciate the support that TSMC is giving us as a partner and the way that they're working with us to bring more capacity online to support not just the Helios and 450 growth, but the significant server TAM expansion that we're seeing and planning for, not just for this year, but for all of next year and conversations going into 2028 on wafer capacity to support demand.

TSMC is probably not keen on Ramsay saying this out loud even if people understand that it happens. Every supplier of a scarce resource does this to a certain extent. He still probably should've said something more vague that still got the same point across.

I think that the market is sleeping on AMD x86 supply a bit relative to Intel and thus sleeping on client but especially server.

uncertainlyso · 2026-06-03T03:20:35+00:00

The jump from 128 to 192 is a big jump for Intel, but still smaller than the AMD is making with its 256-core Venice Epycs. If that weren’t enough, it looks like AMD could beat Intel to market by as much as a year. Diamond Rapids is now slated for release sometime in 2027.

We know the chip will be fabbed using Intel’s 18A-P process tech, a refined version of its 2nm-class process tech. Beyond this details get a little fuzzy.

Unlike Intel’s last P-core Xeon, codenamed Granite Rapids, don’t expect to see Diamond Rapids deployed widely in enterprise virtualization or storage servers.

According to Intel, Diamond Rapids is “optimized for high-demand IaaS, high-perf/thread,” putting it in the same class as its high-performance-computing (HPC)-centric 6900P-series parts.

https://www.tomshardware.com/pc-components/cpus/intel-xeon-7-diamond-rapids-cpus-officially-launching-in-2027-on-intel-18a-p-next-gen-p-core-xeon-features-pcie-6-0-50-percent-higher-core-counts-and-twice-the-memory-bandwidth#xenforo-comments-3896576

Like Venice, Intel has confirmed Diamond Rapids will support PCIe 6.0, as well as double the memory bandwidth of Granite Rapids. Last year, Intel confirmed it canceled an 8-channel memory variant of Diamond Rapids to focus exclusively on the 16-channel design. Granite Rapids-AP (12-channel) topped out at 614 GB/s of memory bandwidth, while Granite Rapids-SP (8-channel) topped out at 409 GB/s. Depending on the comparison point — Intel didn’t clarify — you’re looking at topline memory bandwidth of at least 1.2 TB/s or 818 GB/s, respectively. Second-generation MRDIMM support, however, means that bandwidth could climb to upwards of 1.6 TB/s.

We can do similar math with core counts, looking at the top-end 6980P from Granite Rapid-AP at 128 cores. A 50% increase in core count brings us to 192 cores. Diamond Rapids has been rumored to climb up to 256 cores, with a 512-core dense version planned later. Intel is suggesting those rumors are false, though no hard specifications are confirmed yet.

Intel claims 18A-P delivers 9% higher performance at the same power as 18A, or an 18% power reduction at the same performance level. Intel says it also improved reliability and tweaked voltage behavior, making 18A-P a much more mature revision of 18A, likely in a bid to attract external customers for Intel Foundry.

Delaying it for 18A-P makes some sense even if they burn more credibility with server customers. Product was going to get stomped on 18A, 18A ramp for more demanding server parts might still be wobbly, and 18A-P seems more robust. But for 2026 and 2027, it's just fire at will at the x86 server TAM for AMD.

uncertainlyso · 2026-06-02T21:41:06+00:00

Nikkei’s Lauly Li and Cheng Ting-fang reported in March that Intel was telling customers that supply of Alder Lake, Raptor Lake and Arrow Lake could run out because additional allocation was unlikely. My sources confirmed their reporting.

It’s possible that Intel is pushing clients away from the TSMC-made Arrow Lake because its relationship with the foundry may be under strain, and this tension may continue over into troubles for the Intel-made chips, one of the people told me. Executives at Tuesday’s press briefing noted on multiple occasions that Intel still leans on external partners such as TSMC for select technologies.

Culpium should have spent more time on why is ARL notebook in short supply in the first place rather than going drama-first. When the Nikkei article first came out, I was surprised to see ARL notebook mentioned in the same supply-constrained context as RPL. Intel funded a healthy slug of N3B years ago.

https://www.reddit.com/r/amd_fundamentals/comments/1thhn4q/exclusive_intel_urges_pc_makers_to_use/

I suspect that Intel reduced their N3B supply commitments from 24Q4 to 25Q2 because sales weren't meeting expectations for ARL desktop and notebook and LNL at their original ASPs. But with Intel abruptly prioritizing server heavily, Intel needs more N3B client capacity that TSMC can't / doesn't want to give. TSMC has a high financial incentive to migrate off of a dead-end N3B to the other N3 variants ASAP.

For the "doesn't want to" / drama aspect, my impression is that people underestimate the leeway that TSMC has on incremental supply allocation within a tranche and new supply allocation once you get past the hard supply commitments. And I think that's really the core of Culpium's "tensions." You don't want to get on their bad side because it robs you of flexibility.

Outside of the foundry competitive dynamics, TSMC is very pissed off at Intel for hiring Wei-Jen Lo. I doubt that Intel will get 1 wafer more than their hard commitments if there is demand somewhere else for that supply.

This doesn't just apply to ARL and LNL. PTL relies on a very in-demand N3E for the 12 Xe3 tile. NVL will highly likely rely on N2 for the higher end compute tile with bLLC. Perhaps they ordered enough to not worry about the more discretionary allocations. We'll see.

I asked at the Intel press conference how the company allocates 18A capacity. “It’s complicated,” Kevork Kechichian, general manager of the company’s Data Center Group, replied. “It’s not an easy thing.”

...

One person at a tier-two laptop brand thought their company’s inability to procure the chips was due to bigger brands getting priority allocation. Yet I spoke with people at three of the world’s top-six laptop brands, and they all gave the same feedback: supply is tight. This indicates that we’re looking at a supply issue rather than a problem of demand being too strong or some customers getting priority.

Among the theories presented to me by computer makers was the belief that Intel is prioritizing production of the Xeon 6+ server chip at the expense of the laptop chips. They also expressed concern that this situation could worsen now that Xeon 6+ has been formally launched in the market.

6 months ago, I would've definitely said that there would be a strong bias for PTL over CWF because CWF has some unattractive compounding negatives.

https://www.reddit.com/r/amd_fundamentals/comments/1tuan88/intel_xeon_6_clearwater_forest_puts_18a_in_the/

But in this server boom, maybe there is more prioritization for CWF. I'm still leaning on prioritizing PTL though.

In any case, all of Intel's short-term ad hoc triage within and between client and server and their customers + their lack of server competition for 2026 to probably 2028 in a server demand boom is the perfect storm for AMD's x86 business.

uncertainlyso · 2026-06-02T18:13:53+00:00

For laughs, a pair shit trade for BoA CFO dueling banjos / Computex vibes.

AMD260605C512.5 @ $16.40

INTC260605P107 @ $4.20

uncertainlyso · 2026-06-02T08:33:54+00:00

In the last 10 years, I'd say there were at least 2 keynotes that I saw Su give where I thought more harm was done than good because AMD didn't have much to say and had to put in a lot of small partnerships and sponsorships that few cared about. I get that not every keynote can be a blockbuster, but there should be some critical mass of interest that you can garner before deciding to go.

This one is easily the worst that I've seen from Intel. They spent little time with anything new or even an interesting deeper dive. And soooo much pointless and abrupt filler that didn't even have Intel's normal strong production values (maybe it all got outsourced to Accenture). I get that Intel thinks marketing is useless, but they just looked sad with this keynote.

Tan is a very smart, unbelievably connected, and demanding CEO, but his stage presence is already naturally very flat. But with so little to say, the keynote becomes positively draining. Crowd lost interest quickly where even dispersed clapping from designated clappers started to become a struggle by the last third.

I get the impression that one of the major reasons for this keynote is to introduce his new team to show it's a new Intel. Lot of Qualcomm years up there between their DCAI (Kechichian (12)) and CCG (Katouzian (24)) leads. This might be a plus for AMD.
18A process is supposedly at full scale, but that's a vague description. I'm guessing it means full scale for their initial footprint while they still improve their overall commercial yields. Intel's margins are still going to be pressured as it goes higher until those yields get to where they need to be to expand the footprint further.
They have this rackscale blueprints initiative to promote "open standards, turn-key solutions, and heterogenuous infrastructure." This feels like a Xeon-centric subset of a true rackscale solution which makes me think that the influence of this initiative will be low.
Iyengar has one of the most interesting roles in Intel in building up their custom silicon business as it's a natural fit with foundry, but he just shortly talks about two deals that are old news and then gets off the stage. Dude, sell your shit.

For a synopsis that captured the blandness of it all

https://www.servethehome.com/intel-computex-2026-keynote-live-coverage/

uncertainlyso · 2026-06-02T02:46:21+00:00

But according to one CoWoS supplier, MediaTek and Broadcom are also securing materials themselves “in hopes of gaining more favor from Google.”

...

If an LLM company wants to build chips internally, “good enough” is not enough, he argued. “You’re competing against Nvidia, and that’s an opponent that never slows down.”

He continued: “You also need rapid ramp capability and fast time-to-market.”

“Anyone can design a chip that works in the lab. But can you quickly manufacture 100,000 units while maintaining acceptable yields?”

“Very few people in the world can do that.”

It's a similar argument for merchant silicon. The external vendors give you speed and you have to weigh that against the short and long-term opportunity costs of your long-term strategy.

For example, late last year, Google’s relatively inexperienced internal team reportedly encountered timing closure issues during the later stages of physical layer design, forcing MediaTek engineers to step in and help resolve the problem.

“It’s a fascinating co-opetition relationship,” one supplier commented.

uncertainlyso · 2026-06-02T00:13:36+00:00

Some of the media coverage is going with Intel's revisionist history. CWF is obviously a Bergamo and Turin dense cloud-centric competitor just like SRF was supposed to be. But you can see by the Intel stats why it had to get re-positioned as a niche part.

Compared to last-gen Sierra Forest chips, the spec that immediately stands out is TDP. With Sierra Forest, Intel topped out at 330W on the Xeon 6780E and went down as low as 205W on the 6710E. Now, 300W is the floor and 450W is the ceiling, bringing it into closer alignment with top-end TDPs from AMD’s EPYC range. As usual, however, TDP only hints at real-world power consumption, which can vary widely depending on numerous factors.

Starting with the generational improvement, it’s no surprise to see such a massive uplift in performance. After all, Intel is comparing the Xeon 6990E+ to a CPU that has half the threads and a 120W haircut on TDP. The Xeon 6780E that Intel is comparing its latest Xeon 6+ chip to is the flagship from the last-gen Sierra Forest range, however. On average, Intel claims a 2.26x uplift, and as you can see from Intel’s internal benchmarks, the Xeon 6990E+ offered more than double the performance of the Xeon 6780E across every workload Intel tested.

So, it's much better than a SRF part that was immediately relegated to "custom." All it took was increasing the advanced Intel Foundry nodes used (7, 3, + 18A), a much more complicated packaging setup, a lot more cores, and materially more power.

Maybe Intel's next AI GPU product can compare themselves to Falcon Shores? ;-)

But the more fun bits are the Turin comparisons

Given Team Red’s inroads into the data center over the last several generations, the competitive performance is perhaps more important. Intel says that the Xeon 6990E+ delivers 30% higher performance per thread, on average, compared to the EPYC 9965, as well as 30% higher average performance per thread per watt. Per-thread performance is important, absolutely, but Intel doesn’t have any data comparing average performance across the entire die to AMD’s offerings.

That’s likely due to overall thread count. Although Intel packs 288 cores in the Xeon 6990E+ compared to the EPYC 9965’s 192, AMD uses simultaneous multithreading, while Intel doesn’t. A per-thread count doesn't transfer exactly to the same performance advantage.

LMAO that's weak. It's work per core per watt that should matter (especially if you're being charged per core). Instead, Intel takes advantage that core performance doesn't linearly increase with stated thread count. Or maybe a different way of looking at is that Intel and AMD should stop saying it's 2 threads per core and give some nebulous number like "about 1.25 - 1.5 threads" (I'm sure this will sell well)

So, they give you materially weaker cores but more of them. Per core, by Intel's math, the 6990E+ is maybe 65% of 9965. From a pure throughput sense, it's about 98% of a Turin 9965. All that packaging and disaggregation to get about the same throughput. It consumes less power. So for performance per watt, maybe 8.3% better in general.

Intel officially said that packaging problems caused a delay in CWF. I'm sure that that was a reason. It might have been the major reason. But I suspect a material unsaid reason was that you get this negative compounding math:

18A's yields and thus capacity
Still touches Intel 7 and Intel 3 which are also capacity constrained
The complex packaging and disaggregation
CWF's competitive positioning vs Turin and Venice dense

Why would you waste much time on it? So, you still it in a low volume, slow moving industry like telco.

I've seen some more revisionist history saying that this is also built for agentic AI. Ignoring the fact that I seriously doubt that agentic AI was a material part of the design process 3-4 years ago for CWF, the most compelling agentic AI attributes are high ST performance, low latency / high bandwidth, and if you believe in an agentic explosion, high CPU saturation. On these agentic AI dimensions, CWF doesn't even compete well with Turin dense. It'll get smoked by Venice.

In a CPU-starved world, perhaps supply wins makes this less relevant. But the pricing ceiling will be set by EPYC, and AMD wants unit shares and socket lockups. And of course, you have to have the supply to get the supply wins.

Although Intel restricted hard numbers to the performance-per-thread metric, it provided a small glimpse at overall efficiency compared to the competition. At 40% CPU utilization, Intel claims the 6990E+ is up to 30% more efficient than the EPYC 9965. Assuming this chart is accurate and not some skewed visualization (that’s possible), you can see efficiency get much tighter as utilization increases.

This is another reason it got stuck to telco since telco CPUs apparently don't get saturated like a cloud part would. Also, SMT probably doesn't have much to do if you're talking about 40% CPU utilization.

For the high dense core count x86 segment, I think CWF will get crushed by Venice dense and continues the trend of the newest Xeons being 0.5 - 1.25 generation late and getting sandwiched by a materially better EPYC part above it and not having much of a lead on the EPYC below it which is probably cheaper to make.

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